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MCP2542FDT-H

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Microchip Tech CAN ICs, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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MCP2542FDT-H

Microchip Tech · CAN ICs · SOIC-8

MCP2542FDT-H from Microchip Tech, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 TXD input Transmit Data Input from the CAN controller; low drives CANH/CANL dominant, high is recessive, with an internal ~33 kΩ pull-up to VIO.
2 VSS power_in Ground supply pin.
3 VDD power_in Positive supply voltage pin supplying the transmitter and receiver, including the wake-up receiver.
4 RXD output Receive Data Output, CMOS-compatible, high when the bus is recessive and low when dominant, driven to VIO.
5 VIO power_in Supply for the digital I/O pins (TXD, RXD, STBY), allowing interfacing with 1.8V to 5V controllers.
6 CANL bidirectional CAN Low-Level Voltage I/O driving the low side of the differential bus; disconnects from the bus when the device is unpowered.
7 CANH bidirectional CAN High-Level Voltage I/O driving the high side of the differential bus; disconnects from the bus when the device is unpowered.
8 STBY input Standby Mode Input selecting Normal or Standby mode, with an internal MOS pull-up to VIO (typ. 660 kΩ at 5V, 1.1 MΩ at 3.3V, 4.4 MΩ at 1.8V).

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package SOIC-8
Category Communication Interface Chip/UART/485/232
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
VDD Voltage Range VDD 4.5 5.5 V 13
Supply Current, recessive IDD 2.5 5 mA Recessive, VTXD = VDD 13
Supply Current, dominant IDD 55 70 mA Dominant, VTXD = 0V 13
Standby Current (VDD) IDDS 4 16 µA MCP2542FD and MCP2542WFD, includes IIO 13
Maximum Supply Current IDDMAX 95 140 mA Fault condition: VTXD = VSS, VCANH = VCANL = -5V to +18V (Note 1) 13
POR High Level for VDD VPORH 3 3.95 V Note 1 13
POR Low Level for VDD VPORL 1 2 3.2 V Note 1 13
POR Hysteresis for VDD VPORD 0.2 0.9 2 V Note 1 13
UV High Level for VDD VUVH 4 4.25 4.4 V 13
UV Low Level for VDD VUVL 3.6 3.8 4 V 13
UV Comparator Hysteresis VUVD 0.4 V Note 1 13
Digital Supply Voltage Range VIO 1.7 5.5 V 13
Supply Current on VIO, recessive IIO 7 20 µA Recessive, VTXD = VIO 13
Supply Current on VIO, dominant IIO 200 400 µA Dominant, VTXD = 0V 13
Standby Current on VIO IDDS 0.3 2 µA Bus recessive (Note 1) 13
POR High Level for VIO VPORH_VIO 0.8 1.2 1.7 V 13
POR Low Level for VIO VPORL_VIO 0.7 1.1 1.4 V 13
POR Hysteresis for VIO VPORD_VIO 0.2 V 13
CANH; CANL Recessive Bus Output Voltage VO(R) 2 3 V VTXD = VDD, no load 13
CANH; CANL Bus Output Voltage in Standby VO(S) -0.1 0 0.1 V STBY = VTXD = VDD, no load 14
Recessive Output Current IO(R) -5 5 mA -24V < VCAN < +24V 14
CANH Dominant Output Voltage VO(D) 2.75 3.5 4.5 V TXD = 0, RL = 50 to 65 Ω 14
CANL Dominant Output Voltage VO(D) 0.5 1.5 2.25 V RL = 50 to 65 Ω 14
Driver Symmetry (VCANH + VCANL)/VDD VSYM 0.9 1 1.1 V 1 MHz square wave, Recessive and Dominant states, and transition (Note 1) 14
Dominant Differential Output Voltage VO(DIFF)(D) 1.5 2 3 V VTXD = VSS, RL = 50 to 65 Ω (Note 1) 14
Dominant Differential Output Voltage VO(DIFF)(D) 1.4 2 3.3 V VTXD = VSS, RL = 45 to 70 Ω (Note 1) 14
Dominant Differential Output Voltage VO(DIFF)(D) 1.3 2 3.3 V VTXD = VSS, RL = 40 to 75 Ω 14
Dominant Differential Output Voltage VO(DIFF)(D) 1.5 5 V VTXD = VSS, RL = 2240 Ω (Note 1) 14
Recessive Differential Output Voltage, normal VO(DIFF)(R) -500 0 50 mV VTXD = VDD, no load, normal 14
Recessive Differential Output Voltage, standby VO(DIFF)(S) -200 0 200 mV VTXD = VDD, no load, standby 14
CANH Short-Circuit Output Current IO(SC) -115 -85 mA VTXD = VSS, VCANH = -3V, CANL: floating 14
CANL Short-Circuit Output Current IO(SC) 75 115 mA VTXD = VSS, VCANL = +18V, CANH: floating 14
Recessive Differential Input Voltage, normal VDIFF(R)(I) -4 0.5 V Normal mode, -12V < V(CANH, CANL) < +12V (Note 3) 14
Recessive Differential Input Voltage, standby VDIFF(R)(I) -4 0.4 V Standby mode, -12V < V(CANH, CANL) < +12V (Note 3) 14
Dominant Differential Input Voltage, normal VDIFF(D)(I) 0.9 9 V Normal mode, -12V < V(CANH, CANL) < +12V (Note 3) 15
Dominant Differential Input Voltage, standby VDIFF(D)(I) 1.1 9 V Standby mode, -12V < V(CANH, CANL) < +12V (Note 3) 15
Differential Receiver Threshold, normal VTH(DIFF) 0.5 0.7 0.9 V Normal mode, -12V < V(CANH, CANL) < +12V (Note 3) 15
Differential Receiver Threshold, standby VTH(DIFF) 0.4 0.7 0.9 V Standby mode, -12V < V(CANH, CANL) < +12V (Note 3) 15
Differential Input Hysteresis VHYS(DIFF) 30 200 mV Normal mode (Note 1) 15
Single-Ended Input Resistance RCAN_H, RCAN_L 6 50 kΩ Note 1 15
Internal Resistance Matching mR -3 0 3 % VCANH = VCANL (Note 1) 15
Differential Input Resistance RDIFF 12 25 100 kΩ Note 1 15
Internal Capacitance CIN 20 pF 1 Mbps (Note 1) 15
Differential Internal Capacitance CDIFF 10 pF 1 Mbps (Note 1) 15
CANH, CANL Input Leakage ILI -5 5 µA VDD = VTXD = VSTBY = 0V, VIO = 0V, VCANH = VCANL = 5 V 15
High-Level Input Current IIH -1 1 µA 15
TXD Low-Level Input Current IIL(TXD) -270 -150 -30 µA 15
STBY Low-Level Input Current IIL(STBY) -30 -1 µA 15
RXD Low-Level Output Voltage VOL 0.4 V IOL = 4 mA, typical 8 mA 16
Shutdown Junction Temperature TJ(SD) 165 175 185 °C -12V < V(CANH, CANL) < +12V (Note 1) 16
Shutdown Temperature Hysteresis TJ(HYST) 15 30 °C -12V < V(CANH, CANL) < +12V (Note 1) 16
Delay TXD Low to Bus Dominant tTXD-BUSON 50 85 ns Note 1 17
Delay TXD High to Bus Recessive tTXD-BUSOFF 40 85 ns Note 1 17
Delay Bus Dominant to RXD tBUSON-RXD 70 85 ns Note 1 17
Delay Bus Recessive to RXD tBUSOFF-RXD 110 145 ns Note 1 17
Propagation Delay TXD to RXD tTXD-RXD 90 120 ns Worst case of tLOOP(R) and tLOOP(F) 18
Recessive Bit Time on RXD, 2 Mbps tBIT(RXD), 2M 450 490 550 ns tBIT(TXD) = 500 ns 18
CAN Activity Filter Time (Standby) tFILTER 0.5 1.7 3.6 µs VDIFF(D)(I) = 1.2V to 3V 18
Delay Standby to Normal Mode tWAKE 7 30 µs Negative edge on STBY 18
Permanent Dominant Detect Time tPDT 0.8 1.9 5 ms TXD = 0V 18
Supply voltage VDD VDD 7 V 12
Supply voltage VIO VIO 7 V 12
DC Voltage at CANH and CANL -58 58 V 12
Storage Temperature -55 150 °C 12
Thermal Resistance, 8-Lead SOIC θJA 149.5 °C/W 23

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts tin 8-Lead Plastic Small Outline (SN) - Narrow, 3.90 mm (.150 In.) Body [SOIC] A A2 32

CAD (KiCad official)

  • Symbol: MCP2542FDT-H
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: mcp2542fdt-h-etched.step / mcp2542fdt-h-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mcp2542fdt-h.step / mcp2542fdt-h.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (44 pp, sha256 484a6f42b22dcf87, retrieved 2026-10-26, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF