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MCP2542FDT-E

Public Made by Adom

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Microchip Tech CAN Transceivers, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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MCP2542FDT-E

Microchip Tech · CAN Transceivers · SOIC-8

MCP2542FDT-E from Microchip Tech, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 TXD input Transmit data input: a Low drives CANH and CANL to the Dominant state and a High to Recessive, with an internal pull-up of nominal 33 kΩ to VIO on the MCP2542FD.
2 VSS power_in Ground supply pin.
3 VDD power_in Positive supply voltage pin that supplies the transmitter and receiver, including the wake-up receiver.
4 RXD output CMOS-compatible receive data output that is High when the CAN bus is Recessive and Low when Dominant, driven from VIO on the MCP2542FD.
5 VIO power_in Supply pin for the digital I/O pins (TXD, RXD and STBY), allowing interfacing with 1.8 V to 5 V I/O.
6 CANL bidirectional CAN Low-level voltage I/O that drives the Low side of the CAN differential bus and disconnects from the bus when the device is not powered.
7 CANH bidirectional CAN High-level voltage I/O that drives the High side of the CAN differential bus and disconnects from the bus when the device is not powered.
8 STBY input Standby mode input selecting Normal or Standby mode, with an internal MOS pull-up to VIO on the MCP2542FD (typical 660 kΩ at 5 V, 1.1 MΩ at 3.3 V, 4.4 MΩ at 1.8 V).

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package SOIC-8
Category Interface
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
VDD supply voltage (absolute maximum) VDD 7 V 12
VIO supply voltage (absolute maximum) VIO 7 V 12
DC voltage at TXD, RXD, STBY and VSS -0.3 V Printed upper limit is VIO + 0.3 V (expression, not numeric) 12
DC voltage at CANH and CANL -58 58 V 12
Transient voltage on CANH and CANL (ISO-7637) -150 100 V ISO-7637 (Figure 2-5) 12
Differential bus input voltage VDIFF(I) -5 10 V t = 60 days, continuous 12
Differential bus input voltage (pulses) VDIFF(I) 17 V 1000 pulses, t = 0.1 ms, VCANH = +18V 12
Dominant state detection differential input voltage VDIFF(I) 9 V 10000 pulses, t = 1 ms 12
Operating ambient temperature (absolute maximum) TAMB -40 150 °C 12
Virtual junction temperature TVJ -40 190 °C IEC60747-1 12
Storage temperature (absolute maximum) -55 150 °C 12
Specified temperature range TA -40 125 C 22
Operating temperature range TA -40 150 C 22
Storage temperature range TA -65 155 C 22
Thermal resistance, 8LD SOIC JA 149.5 C/W 22
Supply voltage range (VDD pin) VDD 4.5 5.5 V 13
Supply current (recessive) IDD 2.5 5 mA Recessive; VTXD = VDD 13
Supply current (dominant) IDD 55 70 mA Dominant; VTXD = 0V 13
Standby current (VDD pin) IDDS 4 16 µA MCP2542FD and MCP2542WFD, Includes IIO 13
Maximum supply current IDDMAX 95 140 mA Fault condition: VTXD = VSS; VCANH = VCANL = -5V to +18V (Note 1) 13
High level of the POR comparator for VDD VPORH 3 3.95 V Note 1 13
High level of the UV comparator for VDD VUVH 4 4.25 4.4 V 13
Digital supply voltage range (VIO pin) VIO 1.7 5.5 V 13
Supply current on VIO (recessive) IIO 7 20 µA Recessive; VTXD = VIO 13
Supply current on VIO (dominant) IIO 200 400 µA Dominant; VTXD = 0V 13
Standby current on VIO IDDS 0.3 2 µA Bus Recessive (Note 1) 13
High level of the POR comparator for VIO VPORH_VIO 0.8 1.2 1.7 V 13
Low level of the POR comparator for VIO VPORL_VIO 0.7 1.1 1.4 V 13
CANH; CANL recessive bus output voltage VO(R) 2 3 V VTXD = VDD; No load 13
CANH; CANL bus output voltage in standby VO(S) -0.1 0 0.1 V STBY = VTXD = VDD; No load 13
Recessive output current IO(R) -5 5 mA -24V < VCAN < +24V 14
CANH dominant output voltage VO(D) 2.75 3.5 4.5 V TXD = 0; RL = 50 to 65 14
CANL dominant output voltage 0.5 1.5 2.25 V RL = 50 to 65 14
Driver symmetry (VCANH+VCANL)/VDD VSYM 0.9 1 1.1 V 1 MHz square wave, Recessive and Dominant states, and transition (Note 1) 14
Dominant differential output voltage VO(DIFF)(D) 1.5 2 3 V VTXD = VSS; RL = 50 to 65 14
Recessive differential output voltage VO(DIFF)(R) -500 0 50 mV VTXD = VDD, no load, Normal. 14
Differential output voltage in standby VO(DIFF)(S) -200 0 200 mV VTXD = VDD, no load, Standby. 14
CANH short-circuit output current IO(SC) -115 -85 mA VTXD = VSS; VCANH = -3V; CANL: floating 14
CANL short-circuit output current IO(SC) 75 115 mA VTXD = VSS; VCANL = +18V; CANH: floating 14
Recessive differential input voltage (normal mode) VDIFF(R)(I) -4 0.5 V Normal Mode; -12V < V(CANH, CANL) < +12V; see Figure 2-6 (Note 3) 14
Dominant differential input voltage (normal mode) VDIFF(D)(I) 0.9 9 V Normal Mode; -12V < V(CANH, CANL) < +12V; see Figure 2-6 (Note 3) 14
Differential receiver threshold (normal mode) VTH(DIFF) 0.5 0.7 0.9 V Normal Mode; -12V < V(CANH, CANL) < +12V; see Figure 2-6 (Note 3) 15
Differential input hysteresis VHYS(DIFF) 30 200 mV Normal mode, see Figure 2-6, (Note 1) 15
CANH, CANL input leakage ILI -5 5 µA VDD = VTXD = VSTBY = 0V. For MCP2542FD and MCP2542WFD, VIO = 0V. VCANH = VCANL = 5 V. 15
Low-level input voltage (TXD, STBY), MCP2542FD/WFD VIL -0.3 V MCP2542FD and MCP2542WFD; printed max is 0.3VIO (expression, not numeric) 15
High-level input current IIH -1 1 µA 15
TXD low-level input current IIL(TXD) -270 -150 -30 µA 15
STBY low-level input current IIL(STBY) -30 -1 µA 15
Low-level output voltage (RXD) VOL 0.4 V IOL = 4 mA 16
Shutdown junction temperature TJ(SD) 165 175 185 °C -12V < V(CANH, CANL) < +12V (Note 1) 16
Shutdown temperature hysteresis TJ(HYST) 15 30 °C -12V < V(CANH, CANL) < +12V (Note 1) 16
Nominal bit rate NBR 14.4 8000 kbps 17
Delay TXD low to bus dominant tTXD-BUSON 50 85 ns Note 1 17
Delay TXD high to bus recessive tTXD-BUSOFF 40 85 ns Note 1 17
Delay bus dominant to RXD tBUSON-RXD 70 85 ns Note 1 17
Delay bus recessive to RXD tBUSOFF-RXD 110 145 ns Note 1 17
Propagation delay TXD to RXD (worst case of tLOOP(R) and tLOOP(F)) tTXD-RXD 90 120 ns Figure 2-10 18
CAN activity filter time (standby) tFILTER 0.5 1.7 3.6 µs VDIFF(D)(I) = 1.2V to 3V 18
Delay standby to normal mode tWAKE 7 30 µs Negative edge on STBY 18
Permanent dominant detect time tPDT 0.8 1.9 5 ms TXD = 0V 18

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts tin 2x3x0.75 mm Body (TDFN), 8-lead SN = Plastic Small Outline (SN) - Narrow, 38

CAD (KiCad official)

  • Symbol: MCP2542FDT-E
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: mcp2542fdt-e-etched.step / mcp2542fdt-e-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mcp2542fdt-e.step / mcp2542fdt-e.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (40 pp, sha256 55143672eb0413aa, retrieved 2026-10-20, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF