MCP23S17T-E/SS
Public Made by Adomby adom
Microchip I/O Expanders, SSOP-28-208mil. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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MCP23S17T-E/SS
Microchip · I/O Expanders · SSOP-28-208mil
MCP23S17T-E from Microchip, in a SSOP-28-208mil. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GPB0 | bidirectional | PORTB bit 0. Bidirectional I/O pin with optional interrupt-on-change and internal weak pull-up. |
| 2 | GPB1 | bidirectional | PORTB bit 1. Bidirectional I/O pin with optional interrupt-on-change and internal weak pull-up. |
| 3 | GPB2 | bidirectional | PORTB bit 2. Bidirectional I/O pin with optional interrupt-on-change and internal weak pull-up. |
| 4 | GPB3 | bidirectional | PORTB bit 3. Bidirectional I/O pin with optional interrupt-on-change and internal weak pull-up. |
| 5 | GPB4 | bidirectional | PORTB bit 4. Bidirectional I/O pin with optional interrupt-on-change and internal weak pull-up. |
| 6 | GPB5 | bidirectional | PORTB bit 5. Bidirectional I/O pin with optional interrupt-on-change and internal weak pull-up. |
| 7 | GPB6 | bidirectional | PORTB bit 6. Bidirectional I/O pin with optional interrupt-on-change and internal weak pull-up. |
| 8 | GPB7 | bidirectional | PORTB bit 7. Bidirectional I/O pin with optional interrupt-on-change and internal weak pull-up. |
| 9 | VDD | power_in | Positive supply voltage. Operating range 1.8 V to 5.5 V (industrial) or 4.5 V to 5.5 V (extended, -40 to +125°C). Bypass locally with 0.1 µF. |
| 10 | VSS | power_in | Ground reference (0 V). |
| 11 | CS | input | SPI chip select, active low. Frames a SPI transaction on the MCP23S17. |
| 12 | SCK | input | SPI serial clock input (up to 10 MHz). |
| 13 | SI | input | SPI serial data input (MOSI from host). |
| 14 | SO | output | SPI serial data output (MISO to host). Typically driven only during a read cycle. |
| 15 | A0 | input | Hardware address bit 0. Must be externally tied to VDD or VSS; combined with A1/A2 forms the SPI device address. |
| 16 | A1 | input | Hardware address bit 1. Must be externally tied to VDD or VSS. |
| 17 | A2 | input | Hardware address bit 2. Must be externally tied to VDD or VSS; up to 8 devices share the bus. |
| 18 | RESET | input | Hardware reset, active low. Must be tied high (or driven high) for normal operation; asserting low returns all registers to POR defaults. |
| 19 | INTB | output | Interrupt output for PORTB. Configurable as active-high, active-low, or open-drain (via IOCON register). |
| 20 | INTA | output | Interrupt output for PORTA. Configurable as active-high, active-low, or open-drain; can be mirrored with INTB. |
| 21 | GPA0 | bidirectional | PORTA bit 0. Bidirectional I/O pin with optional interrupt-on-change and internal weak pull-up. |
| 22 | GPA1 | bidirectional | PORTA bit 1. Bidirectional I/O pin with optional interrupt-on-change and internal weak pull-up. |
| 23 | GPA2 | bidirectional | PORTA bit 2. Bidirectional I/O pin with optional interrupt-on-change and internal weak pull-up. |
| 24 | GPA3 | bidirectional | PORTA bit 3. Bidirectional I/O pin with optional interrupt-on-change and internal weak pull-up. |
| 25 | GPA4 | bidirectional | PORTA bit 4. Bidirectional I/O pin with optional interrupt-on-change and internal weak pull-up. |
| 26 | GPA5 | bidirectional | PORTA bit 5. Bidirectional I/O pin with optional interrupt-on-change and internal weak pull-up. |
| 27 | GPA6 | bidirectional | PORTA bit 6. Bidirectional I/O pin with optional interrupt-on-change and internal weak pull-up. |
| 28 | GPA7 | bidirectional | PORTA bit 7. Bidirectional I/O pin with optional interrupt-on-change and internal weak pull-up. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip |
| Package | SSOP-28-208mil |
| Category | Interface |
| Pins | 28 |
Ordering variants
Same part, different packaging or reel option.
MCP23S17T-EE/SOMCP23S17T-E/SOMCP23S17T-EE/SSMCP23S17T-E/SSMCP23S17T-EE/PMCP23S17T-E/PMCP23S17T-EE/MLMCP23S17T-E/ML
CAD (KiCad official)
- Symbol:
MCP23S17T-E - Footprint:
Package_SO:SSOP-28_5.3x10.2mm_P0.65mm - 3D model: SSOP-28-208mil (KiCad packages3D, STEP)
- 3D model files:
mcp23s17t-e-etched.step/mcp23s17t-e-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mcp23s17t-e.step/mcp23s17t-e.glbare the bare package body.
3D model downloads
Two STEP files. Same geometry, different body top:
| File | Size | Use it when |
|---|---|---|
mcp23s17t-e.step |
362 KB | You want the bare part, or you mark your own boards. |
mcp23s17t-e-etched.step |
3.0 MB | You want the part with MCP23S17T-E already on it. |
The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 759 faces against 447 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip datasheet (48 pp, sha256
0d23e5d2e71a68cd, retrieved 2026-08-17, tier: manufacturer) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).
Other parts in this family
This page is MCP23S17T-E/SS. These part numbers share its family name but are different parts (another package, rating or grade), each with its own page:
- MCP23S17T-E/ML
- MCP23S17T-E/SO
# MCP23S17T-E/SS
**Microchip** · I/O Expanders · SSOP-28-208mil
MCP23S17T-E from Microchip, in a SSOP-28-208mil. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GPB0 | bidirectional | PORTB bit 0. Bidirectional I/O pin with optional interrupt-on-change and internal weak pull-up. |
| 2 | GPB1 | bidirectional | PORTB bit 1. Bidirectional I/O pin with optional interrupt-on-change and internal weak pull-up. |
| 3 | GPB2 | bidirectional | PORTB bit 2. Bidirectional I/O pin with optional interrupt-on-change and internal weak pull-up. |
| 4 | GPB3 | bidirectional | PORTB bit 3. Bidirectional I/O pin with optional interrupt-on-change and internal weak pull-up. |
| 5 | GPB4 | bidirectional | PORTB bit 4. Bidirectional I/O pin with optional interrupt-on-change and internal weak pull-up. |
| 6 | GPB5 | bidirectional | PORTB bit 5. Bidirectional I/O pin with optional interrupt-on-change and internal weak pull-up. |
| 7 | GPB6 | bidirectional | PORTB bit 6. Bidirectional I/O pin with optional interrupt-on-change and internal weak pull-up. |
| 8 | GPB7 | bidirectional | PORTB bit 7. Bidirectional I/O pin with optional interrupt-on-change and internal weak pull-up. |
| 9 | VDD | power_in | Positive supply voltage. Operating range 1.8 V to 5.5 V (industrial) or 4.5 V to 5.5 V (extended, -40 to +125°C). Bypass locally with 0.1 µF. |
| 10 | VSS | power_in | Ground reference (0 V). |
| 11 | CS | input | SPI chip select, active low. Frames a SPI transaction on the MCP23S17. |
| 12 | SCK | input | SPI serial clock input (up to 10 MHz). |
| 13 | SI | input | SPI serial data input (MOSI from host). |
| 14 | SO | output | SPI serial data output (MISO to host). Typically driven only during a read cycle. |
| 15 | A0 | input | Hardware address bit 0. Must be externally tied to VDD or VSS; combined with A1/A2 forms the SPI device address. |
| 16 | A1 | input | Hardware address bit 1. Must be externally tied to VDD or VSS. |
| 17 | A2 | input | Hardware address bit 2. Must be externally tied to VDD or VSS; up to 8 devices share the bus. |
| 18 | RESET | input | Hardware reset, active low. Must be tied high (or driven high) for normal operation; asserting low returns all registers to POR defaults. |
| 19 | INTB | output | Interrupt output for PORTB. Configurable as active-high, active-low, or open-drain (via IOCON register). |
| 20 | INTA | output | Interrupt output for PORTA. Configurable as active-high, active-low, or open-drain; can be mirrored with INTB. |
| 21 | GPA0 | bidirectional | PORTA bit 0. Bidirectional I/O pin with optional interrupt-on-change and internal weak pull-up. |
| 22 | GPA1 | bidirectional | PORTA bit 1. Bidirectional I/O pin with optional interrupt-on-change and internal weak pull-up. |
| 23 | GPA2 | bidirectional | PORTA bit 2. Bidirectional I/O pin with optional interrupt-on-change and internal weak pull-up. |
| 24 | GPA3 | bidirectional | PORTA bit 3. Bidirectional I/O pin with optional interrupt-on-change and internal weak pull-up. |
| 25 | GPA4 | bidirectional | PORTA bit 4. Bidirectional I/O pin with optional interrupt-on-change and internal weak pull-up. |
| 26 | GPA5 | bidirectional | PORTA bit 5. Bidirectional I/O pin with optional interrupt-on-change and internal weak pull-up. |
| 27 | GPA6 | bidirectional | PORTA bit 6. Bidirectional I/O pin with optional interrupt-on-change and internal weak pull-up. |
| 28 | GPA7 | bidirectional | PORTA bit 7. Bidirectional I/O pin with optional interrupt-on-change and internal weak pull-up. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip |
| Package | SSOP-28-208mil |
| Category | Interface |
| Pins | 28 |
## Ordering variants
Same part, different packaging or reel option.
- `MCP23S17T-EE/SO`
- `MCP23S17T-E/SO`
- `MCP23S17T-EE/SS`
- `MCP23S17T-E/SS`
- `MCP23S17T-EE/P`
- `MCP23S17T-E/P`
- `MCP23S17T-EE/ML`
- `MCP23S17T-E/ML`
## CAD (KiCad official)
- Symbol: `MCP23S17T-E`
- Footprint: `Package_SO:SSOP-28_5.3x10.2mm_P0.65mm`
- 3D model: SSOP-28-208mil (KiCad packages3D, STEP)
- 3D model files: `mcp23s17t-e-etched.step` / `mcp23s17t-e-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `mcp23s17t-e.step` / `mcp23s17t-e.glb` are the bare package body.
## 3D model downloads
Two STEP files. Same geometry, different body top:
| File | Size | Use it when |
|---|---|---|
| [`mcp23s17t-e.step`](mcp23s17t-e.step) | 362 KB | You want the bare part, or you mark your own boards. |
| [`mcp23s17t-e-etched.step`](mcp23s17t-e-etched.step) | 3.0 MB | You want the part with `MCP23S17T-E` already on it. |
The marking in the etched file is real recessed geometry cut into the solid, not a
texture or a decal: 759 faces against 447 in the bare model. It
survives export, section views, and rendering in any CAD tool, and it drops straight
into KiCad or Fusion with no extra setup.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Microchip datasheet](docs/mcp23s17t-e-datasheet.pdf) (48 pp, sha256 `0d23e5d2e71a68cd`, retrieved 2026-08-17, tier: manufacturer)
- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/mcp23s17t-e-datasheet.pdf)
## Other parts in this family
This page is **MCP23S17T-E/SS**. These part numbers share its family name but are different parts (another package, rating or grade), each with its own page:
- MCP23S17T-E/ML
- MCP23S17T-E/SO