component
MCP23S09T-E
Public Made by Adomby adom
Microchip Tech I/O Expanders, QFN-16-EP(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownMCP23S09T-E
Microchip Tech · I/O Expanders · QFN-16-EP(3x3)
MCP23S09T-E from Microchip Tech, in a QFN-16-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VSS | power_in | Ground (high-current capable). |
| 2 | SCK | input | Serial clock input for the SPI interface. |
| 3 | VDD | power_in | Power supply pin (high-current capable), operating range 1.8V to 5.5V. |
| 4 | CS | input | Chip select input for the SPI interface. |
| 5 | SI | input | Serial data input for the SPI interface. |
| 6 | SO | output | Serial data output for the SPI interface. |
| 7 | RESET | input | Hardware reset input, which must be externally biased. |
| 8 | INT | output | Interrupt output for the port, configurable as active-high, active-low or open-drain. |
| 9 | GP0 | bidirectional | Bidirectional I/O pin with 5.5V tolerant input and open-drain output, can be enabled for interrupt-on-change and/or internal pull-up resistor. |
| 10 | GP1 | bidirectional | Bidirectional I/O pin with 5.5V tolerant input and open-drain output, can be enabled for interrupt-on-change and/or internal pull-up resistor. |
| 11 | GP2 | bidirectional | Bidirectional I/O pin with 5.5V tolerant input and open-drain output, can be enabled for interrupt-on-change and/or internal pull-up resistor. |
| 12 | GP3 | bidirectional | Bidirectional I/O pin with 5.5V tolerant input and open-drain output, can be enabled for interrupt-on-change and/or internal pull-up resistor. |
| 13 | GP4 | bidirectional | Bidirectional I/O pin with 5.5V tolerant input and open-drain output, can be enabled for interrupt-on-change and/or internal pull-up resistor. |
| 14 | GP5 | bidirectional | Bidirectional I/O pin with 5.5V tolerant input and open-drain output, can be enabled for interrupt-on-change and/or internal pull-up resistor. |
| 15 | GP6 | bidirectional | Bidirectional I/O pin with 5.5V tolerant input and open-drain output, can be enabled for interrupt-on-change and/or internal pull-up resistor. |
| 16 | GP7 | bidirectional | Bidirectional I/O pin with 5.5V tolerant input and open-drain output, can be enabled for interrupt-on-change and/or internal pull-up resistor. |
| 17 | EP | passive | Exposed thermal pad, can be left floating or connected to VSS. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | QFN-16-EP(3x3) |
| Category | Communication Interface Chip/UART/485/232 |
| Pins | 17 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage | VDD | 1.8 | 5.5 | V | 30 | ||
| Supply Current | IDD | 1 | mA | SCL/SCK = 1 MHz | 30 | ||
| Standby current | IDDS | 1 | µA | -40°C ≤ TA ≤ +85°C | 30 | ||
| Standby current | IDDS | 6 | µA | +85°C ≤ TA ≤ +125°C | 30 | ||
| VDD Rise Rate to Ensure POR | SVDD | 0.05 | V/ms | Design guidance only. Not tested. | 30 | ||
| GPIO Input High-Voltage max | VIH | 5.5 | V | GPIO | 30 | ||
| Input Leakage Current | IIL | -1 | 1 | µA | VSS ≤ VPIN ≤ VDD | 30 | |
| Output Leakage Current | ILO | -1 | 1 | µA | VSS ≤ VPIN ≤ VDD | 30 | |
| GPIO internal pull-up current | IPU | 220 | µA | VDD = 5V, GP Pins = VSS | 30 | ||
| GPIO Output Low-Voltage | VOL | 0.6 | V | IOL = 8.5 mA, VDD = 4.5V (open-drain) | 30 | ||
| INT Output Low-Voltage | VOL | 0.6 | V | IOL = 1.6 mA, VDD = 4.5V | 30 | ||
| SO, SDA Output Low-Voltage | VOL | 0.6 | V | IOL = 3.0 mA, VDD = 1.8V | 30 | ||
| SDA Output Low-Voltage | VOL | 0.8 | V | IOL = 3.0 mA, VDD = 4.5V | 30 | ||
| Output load capacitance GPIO, SO, INT | CIO | 50 | pF | Load conditions for timing specs | 30 | ||
| Output load capacitance SDA | CB | 400 | pF | 30 | |||
| Ambient temperature under bias | -40 | 125 | °C | 29 | |||
| Storage temperature | -65 | 150 | °C | 29 | |||
| Voltage on VDD with respect to VSS | VDD | -0.3 | 7 | V | 29 | ||
| Voltage on RESET with respect to VSS | -0.3 | 14 | V | 29 | |||
| Voltage on GPIO Pins | -0.6 | 5.5 | V | 29 | |||
| Maximum current into VDD pin | 125 | mA | 29 | ||||
| Input clamp current | IIK | -20 | 20 | mA | VI < 0 or VI > VDD | 29 | |
| Output clamp current | IOK | -20 | 20 | mA | VO < 0 or VO > VDD | 29 | |
| Maximum output current sunk by any output pin | 25 | mA | 29 | ||||
| ESD protection on all pins (HBM) | 4 | kV | HBM | 29 | |||
| ESD protection on all pins (MM) | 400 | V | MM | 29 | |||
| RESET Pulse Width (low) | TRSTL | 1 | µs | VDD = 5.0V | 31 | ||
| Output high-impedance from RESET Low | TIOZ | 1 | µs | 31 | |||
| Serial data to output valid | tGPOV | 500 | ns | 32 | |||
| Interrupt pin disable time | tINTD | 600 | ns | 32 | |||
| IOC event to INT active | tGPINT | 600 | ns | 32 | |||
| Glitch filter on GP pins | tGLITCH | 50 | ns | Note 1 | 32 | ||
| SPI Clock Frequency | FCLK | 10 | MHz | 1.8V, 5.5V | 38 | ||
| CS Setup Time | TCSS | 50 | ns | 38 | |||
| CS Hold Time | TCSH | 50 | ns | 1.8V, 5.5V | 38 | ||
| CS Disable Time | TCSD | 50 | ns | 1.8V, 5.5V | 38 | ||
| Data Setup Time | TSU | 10 | ns | 1.8V, 5.5V | 38 | ||
| Data Hold Time | THD | 10 | ns | 1.8V, 5.5V | 38 | ||
| CLK Rise Time | TR | 2 | µs | Note 1 | 38 | ||
| CLK Fall Time | TF | 2 | µs | Note 1 | 38 | ||
| Clock High Time | THI | 45 | ns | 1.8V, 5.5V | 38 | ||
| Clock Low Time | TLO | 45 | ns | 1.8V, 5.5V | 38 | ||
| Clock Delay Time | TCLD | 50 | ns | 38 | |||
| Clock Enable Time | TCLE | 50 | ns | 38 | |||
| Output Valid from Clock Low | TV | 45 | ns | 1.8V, 5.5V | 38 | ||
| Output Hold Time | THO | 0 | ns | 38 | |||
| Output Disable Time | TDIS | 100 | ns | 38 |
CAD (KiCad official)
- Symbol:
MCP23S09T-E - Footprint:
Package_DFN_QFN:QFN-16-1EP_3x3mm_P0.5mm_EP1.7x1.7mm - 3D model: QFN-16-EP(3x3) (KiCad packages3D, STEP)
- 3D model files:
mcp23s09t-e-etched.step/mcp23s09t-e-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mcp23s09t-e.step/mcp23s09t-e.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (52 pp, sha256
70744ea2313e65a6, retrieved 2026-10-26, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).