component
MCP23S08T-E
Public Made by Adomby adom
Microchip Tech I/O Expanders, SSOP-20-208mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownMCP23S08T-E
Microchip Tech · I/O Expanders · SSOP-20-208mil
MCP23S08T-E from Microchip Tech, in a SSOP-20-208mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | SCL/SCK | input | Serial clock input; on the MCP23S08 SPI variant this pin is SCK. |
| 2 | SDA/SI | input | Serial data input on the MCP23S08 (the MCP23008 uses this pin as bidirectional serial data I/O). |
| 3 | A2/SO | output | Serial data output on the MCP23S08; the datasheet lists this shared pin as I/O because it serves as hardware address A2 on the MCP23008. |
| 4 | A1 | input | Hardware address input that must be biased externally. |
| 5 | A0 | input | Hardware address input that must be biased externally. |
| 6 | RESET | input | External reset input that must be biased externally. |
| 7 | NC/CS | input | External chip select input on the MCP23S08; SPI write and read operations are started by lowering CS. |
| 8 | INT | output | Interrupt output that can be configured as active-high, active-low or open-drain. |
| 9 | VSS | power_in | Ground. |
| 10 | N/C | unconnected | No connect pin in the SSOP package. |
| 11 | N/C | unconnected | No connect pin in the SSOP package. |
| 12 | GP0 | bidirectional | Bidirectional I/O pin that can be enabled for interrupt-on-change and/or an internal weak pull-up resistor. |
| 13 | GP1 | bidirectional | Bidirectional I/O pin that can be enabled for interrupt-on-change and/or an internal weak pull-up resistor. |
| 14 | GP2 | bidirectional | Bidirectional I/O pin that can be enabled for interrupt-on-change and/or an internal weak pull-up resistor. |
| 15 | GP3 | bidirectional | Bidirectional I/O pin that can be enabled for interrupt-on-change and/or an internal weak pull-up resistor. |
| 16 | GP4 | bidirectional | Bidirectional I/O pin that can be enabled for interrupt-on-change and/or an internal weak pull-up resistor. |
| 17 | GP5 | bidirectional | Bidirectional I/O pin that can be enabled for interrupt-on-change and/or an internal weak pull-up resistor. |
| 18 | GP6 | bidirectional | Bidirectional I/O pin that can be enabled for interrupt-on-change and/or an internal weak pull-up resistor. |
| 19 | GP7 | bidirectional | Bidirectional I/O pin that can be enabled for interrupt-on-change and/or an internal weak pull-up resistor. |
| 20 | VDD | power_in | Power supply; the datasheet gives 1.8 V to 5.5 V at -40°C to +85°C, and 4.5 V to 5.5 V at -40°C to +125°C. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SSOP-20-208mil |
| Category | Interface |
| Pins | 20 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Voltage on all other pins with respect to VSS (except VDD), minimum | -0.6 | V | 23 | ||||
| Voltage on VDD with respect to VSS | -0.3 | 5.5 | V | 23 | |||
| Ambient temperature under bias | -40 | 125 | °C | 23 | |||
| Storage temperature | -65 | 150 | °C | 23 | |||
| Maximum current out of VSS pin | 150 | mA | 23 | ||||
| Maximum current into VDD pin | 125 | mA | 23 | ||||
| Input clamp current | IIK | -20 | 20 | mA | VI < 0 or VI > VDD | 23 | |
| Output clamp current | IOK | -20 | 20 | mA | VO < 0 or VO > VDD | 23 | |
| Supply Voltage | VDD | 1.8 | 5.5 | V | 24 | ||
| VDD Rise Rate to Ensure Power-on Reset | SVDD | 0.05 | V/ms | Design guidance only. Not tested. | 24 | ||
| Supply Current | IDD | 1 | mA | SCL/SCK = 1 MHz | 24 | ||
| Standby current | IDDS | 1 | µA | 24 | |||
| Standby current | IDDS | 2 | µA | 4.5V - 5.5V @ +125°C (Note 1) | 24 | ||
| Input Leakage Current, I/O port pins (minimum) | IIL | -1 | 1 | µA | VSS ≤ VPIN ≤ VDD | 24 | |
| Output Leakage Current, I/O port pins | ILO | -1 | 1 | µA | VSS ≤ VPIN ≤ VDD | 24 | |
| GPIO weak pull-up current | IPU | 40 | 75 | 115 | µA | VDD = 5V, GP Pins = VSS; -40°C ≤ TA ≤ +85°C | 24 |
| Output Low-Voltage, GPIO | VOL | 0.6 | V | IOL = 8.5 mA, VDD = 4.5V | 24 | ||
| Output Low-Voltage, INT | VOL | 0.6 | V | IOL = 1.6 mA, VDD = 4.5V | 24 | ||
| Output Low-Voltage, SO, SDA | VOL | 0.6 | V | IOL = 3.0 mA, VDD = 1.8V | 24 | ||
| Capacitive Loading, output pins GPIO, SO, INT | CIO | 50 | pF | 24 | |||
| RESET Pulse Width (Low) | TRSTL | 1 | µs | 26 | |||
| Output High-Impedance From RESET Low | TIOZ | 1 | µs | 26 | |||
| Clock Frequency | FCLK | 5 | MHz | 1.8V, 5.5V (I-Temp) | 29 | ||
| Clock Frequency | FCLK | 10 | MHz | 2.7V, 5.5V (I-Temp) | 29 | ||
| CS Setup Time | TCSS | 50 | ns | 29 | |||
| CS Hold Time | TCSH | 100 | ns | 1.8V, 5.5V (I-Temp) | 29 | ||
| CS Hold Time | TCSH | 50 | ns | 2.7V, 5.5V (I-Temp) | 29 | ||
| CS Disable Time | TCSD | 100 | ns | 1.8V, 5.5V (I-Temp) | 29 | ||
| CS Disable Time | TCSD | 50 | ns | 2.7V, 5.5V (I-Temp) | 29 | ||
| Data Setup Time | TSU | 20 | ns | 1.8V, 5.5V (I-Temp) | 29 | ||
| Data Setup Time | TSU | 10 | ns | 2.7V, 5.5V (I-Temp) | 29 | ||
| Data Hold Time | THD | 20 | ns | 1.8V, 5.5V (I-Temp) | 29 | ||
| Data Hold Time | THD | 10 | ns | 2.7V, 5.5V (I-Temp) | 29 | ||
| CLK Rise Time | TR | 2 | µs | 29 | |||
| CLK Fall Time | TF | 2 | µs | 29 | |||
| Clock High Time | THI | 90 | ns | 1.8V, 5.5V (I-Temp) | 29 | ||
| Clock High Time | THI | 45 | ns | 2.7V, 5.5V (I-Temp) | 29 | ||
| Clock Low Time | TLO | 90 | ns | 1.8V, 5.5V (I-Temp) | 30 | ||
| Clock Low Time | TLO | 45 | ns | 2.7V, 5.5V (I-Temp) | 30 | ||
| Clock Delay Time | TCLD | 50 | ns | 30 | |||
| Output Valid from Clock Low | TV | 90 | ns | 1.8V, 5.5V (I-Temp) | 30 | ||
| Output Valid from Clock Low | TV | 45 | ns | 2.7V, 5.5V (I-Temp) | 30 | ||
| Output Hold Time | THO | 0 | ns | 30 | |||
| Output Disable Time | TDIS | 100 | ns | 30 | |||
| Serial data to output valid | TGPOV | 500 | ns | 31 | |||
| Interrupt pin disable time | TINTD | 600 | ns | 31 | |||
| GP input change to register valid | TGPIV | 450 | ns | 31 | |||
| IOC event to INT active | TGPINT | 600 | ns | 31 | |||
| Glitch Filter on GP Pins | TGLITCH | 150 | ns | 31 |
CAD (KiCad official)
- Symbol:
MCP23S08T-E - Footprint:
Package_SO:SSOP-20_5.3x7.2mm_P0.65mm - 3D model: SSOP-20-208mil (KiCad packages3D, STEP)
- 3D model files:
mcp23s08t-e-etched.step/mcp23s08t-e-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mcp23s08t-e.step/mcp23s08t-e.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (44 pp, sha256
573ae3991f57d129, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).