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MCP23018T-E

Public Made by Adom

by adom

Microchip Tech I/O Expanders, QFN-24-EP(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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3D Model

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Symbol & Footprint

Schematic Symbol

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PCB Footprint

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Datasheet

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Contents

README

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MCP23018T-E

Microchip Tech · I/O Expanders · QFN-24-EP(4x4)

MCP23018T-E from Microchip Tech, in a QFN-24-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GPB1 bidirectional Bidirectional I/O pin with 5.5 volt tolerant input and open-drain output, can be enabled for interrupt on change and/or internal pull-up resistor.
2 GPB2 bidirectional Bidirectional I/O pin with 5.5 volt tolerant input and open-drain output, can be enabled for interrupt on change and/or internal pull-up resistor.
3 GPB3 bidirectional Bidirectional I/O pin with 5.5 volt tolerant input and open-drain output, can be enabled for interrupt on change and/or internal pull-up resistor.
4 GPB4 bidirectional Bidirectional I/O pin with 5.5 volt tolerant input and open-drain output, can be enabled for interrupt on change and/or internal pull-up resistor.
5 GPB5 bidirectional Bidirectional I/O pin with 5.5 volt tolerant input and open-drain output, can be enabled for interrupt on change and/or internal pull-up resistor.
6 GPB6 bidirectional Bidirectional I/O pin with 5.5 volt tolerant input and open-drain output, can be enabled for interrupt on change and/or internal pull-up resistor.
7 GPB7 bidirectional Bidirectional I/O pin with 5.5 volt tolerant input and open-drain output, can be enabled for interrupt on change and/or internal pull-up resistor.
8 VDD power_in Power supply pin, operating voltage 1.8V to 5.5V.
9 SCL input Serial clock input for the I2C interface.
10 SDA bidirectional Serial data I/O for the I2C interface.
11 ADDR input Hardware address pin that allows up to 8 client devices on the bus.
12 RESET input Hardware reset input.
13 INTB output Interrupt output for port B, configurable as active high, active low, or open drain.
14 INTA output Interrupt output for port A, configurable as active high, active low, or open drain.
15 GPA0 bidirectional Bidirectional I/O pin with 5.5 volt tolerant input and open-drain output, can be enabled for interrupt on change and/or internal pull-up resistor.
16 GPA1 bidirectional Bidirectional I/O pin with 5.5 volt tolerant input and open-drain output, can be enabled for interrupt on change and/or internal pull-up resistor.
17 GPA2 bidirectional Bidirectional I/O pin with 5.5 volt tolerant input and open-drain output, can be enabled for interrupt on change and/or internal pull-up resistor.
18 GPA3 bidirectional Bidirectional I/O pin with 5.5 volt tolerant input and open-drain output, can be enabled for interrupt on change and/or internal pull-up resistor.
19 GPA4 bidirectional Bidirectional I/O pin with 5.5 volt tolerant input and open-drain output, can be enabled for interrupt on change and/or internal pull-up resistor.
20 GPA5 bidirectional Bidirectional I/O pin with 5.5 volt tolerant input and open-drain output, can be enabled for interrupt on change and/or internal pull-up resistor.
21 GPA6 bidirectional Bidirectional I/O pin with 5.5 volt tolerant input and open-drain output, can be enabled for interrupt on change and/or internal pull-up resistor.
22 GPA7 bidirectional Bidirectional I/O pin with 5.5 volt tolerant input and open-drain output, can be enabled for interrupt on change and/or internal pull-up resistor.
23 VSS power_in Ground pin.
24 GPB0 bidirectional Bidirectional I/O pin with 5.5 volt tolerant input and open-drain output, can be enabled for interrupt on change and/or internal pull-up resistor.
25 EP passive Exposed thermal pad that should either be left electrically unconnected or connected to VSS.

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package QFN-24-EP(4x4)
Category Communication Interface Chip/UART/485/232
Pins 25

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply Voltage VDD 1.8 5.5 V 32
Operating temperature (E range) TA -40 125 °C 1.8V ≤ VDD ≤ 5.5V 32
Ambient temperature under bias -40 125 °C 31
Storage temperature -65 150 °C 31
Voltage on VDD with respect to VSS VDD -0.3 7 V 31
Voltage on RESET with respect to VSS -0.3 14 V 31
Voltage on GPIO pins -0.6 5.5 V 31
Maximum current out of VSS pin 400 mA 31
Maximum current into VDD pin 125 mA 31
Input clamp current IIK 20 mA VI < 0 or VI > VDD 31
Output clamp current IOK 20 mA VO < 0 or VO > VDD 31
Maximum output current sunk by any Output pin 25 mA 31
Maximum output current sourced by any Output pin 25 mA 31
VDD Rise Rate to Ensure Power-on Reset SVDD 0.05 V/ms Design guidance only. Not tested. 32
Supply Current IDD 1 mA SCL/SCK = 1 MHz 32
Standby (Idle) current IDDS 1 µA -40°C ≤ TA ≤ +85°C 32
Standby (Idle) current IDDS 6 µA +85°C ≤ TA ≤ +125°C 32
Input High-Voltage GPIO VIH 5.5 V GPIO 32
Input Leakage Current, I/O port pins IIL -1 1 µA VSS ≤ VPIN ≤ VDD 32
Output Leakage Current, I/O port pins ILO -1 1 µA VSS ≤ VPIN ≤ VDD 32
Output Low-Voltage GPIO VOL 0.6 V IOL = 8.5 mA, VDD = 4.5V (open-drain) 32
Output Low-Voltage INT VOL 0.6 V IOL = 1.6 mA, VDD = 4.5V 32
Output Low-Voltage SO, SDA VOL 0.6 V IOL = 3.0 mA, VDD = 1.8V 32
Output Low-Voltage SDA VOL 0.8 V IOL = 3.0 mA, VDD = 4.5V 32
Capacitive Loading GPIO, SO, INT CIO 50 pF 32
Capacitive Loading SDA CB 400 pF 32
RESET Pulse Width (low) TRSTL 1 µs VDD = 5.0V 33
Output Hi-impedance from RESET Low TioZ 1 µs 33
Serial data to output valid tGPOV 500 ns 34
Interrupt pin disable time tINTD 600 ns 34
IOC event to INT active tGPINT 600 ns 34
Glitch filter on GP pins tGLITCH 50 ns Note 1 34
Clock High Time, 100 kHz mode THIGH 4 µs 1.8V, 5.5V 37
Clock High Time, 400 kHz mode THIGH 0.6 µs 1.8V, 5.5V 37
Clock High Time, 3.4 MHz mode THIGH 0.06 µs 2.7V, 5.5V 37
Clock Low Time, 100 kHz mode TLOW 4.7 µs 1.8V, 5.5V 37
Clock Low Time, 400 kHz mode TLOW 1.3 µs 1.8V, 5.5V 37
Clock Low Time, 3.4 MHz mode TLOW 0.16 µs 2.7V, 5.5V 37
SDA and SCL Rise Time, 100 kHz mode TR 1000 ns 1.8V, 5.5V 37
SDA and SCL Rise Time, 400 kHz mode TR 300 ns 1.8V, 5.5V 37
SDA and SCL Rise Time, 3.4 MHz mode TR 10 80 ns 2.7V, 5.5V 37
SDA and SCL Fall Time, 100 kHz mode TF 300 ns 1.8V, 5.5V 37
SDA and SCL Fall Time, 400 kHz mode TF 300 ns 1.8V, 5.5V 37
SDA and SCL Fall Time, 3.4 MHz mode TF 10 80 ns 2.7V, 5.5V 37
START Condition Setup Time, 100 kHz mode TSU:STA 4.7 µs 1.8V, 5.5V 37
START Condition Setup Time, 400 kHz mode TSU:STA 0.6 µs 1.8V, 5.5V 37
START Condition Hold Time, 100 kHz mode THD:STA 4 µs 1.8V, 5.5V 37
START Condition Hold Time, 400 kHz mode THD:STA 0.6 µs 1.8V, 5.5V 37
Data Input Hold Time, 100 kHz mode THD:DAT 0 3.45 µs 1.8V, 5.5V 37
Data Input Hold Time, 400 kHz mode THD:DAT 0 0.9 µs 1.8V, 5.5V 37
Data Input Setup Time, 100 kHz mode TSU:DAT 250 ns 1.8V, 5.5V 37
Data Input Setup Time, 400 kHz mode TSU:DAT 100 ns 1.8V, 5.5V 37
STOP Condition Setup Time, 100 kHz mode TSU:STO 4 µs 1.8V, 5.5V 37
Output Valid From Clock, 100 kHz mode TAA 3.45 µs 1.8V, 5.5V 38
Output Valid From Clock, 400 kHz mode TAA 0.9 µs 1.8V, 5.5V 38
Bus Free Time, 100 kHz mode TBUF 4.7 µs 1.8V, 5.5V 38
Bus Free Time, 400 kHz mode TBUF 1.3 µs 1.8V, 5.5V 38
GPIO internal pull-up current IPU 220 µA VDD = 5V, GP Pins = VSS 32
GP input change to register valid tGPIV 450 ns Note 1 34

CAD (KiCad official)

  • Symbol: MCP23018T-E
  • Footprint: Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.6x2.6mm
  • 3D model: QFN-24-EP(4x4) (KiCad packages3D, STEP)
  • 3D model files: mcp23018t-e-etched.step / mcp23018t-e-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mcp23018t-e.step / mcp23018t-e.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (58 pp, sha256 e2db995786ddfd12, retrieved 2026-10-26, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF