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MCP23008-E

Microchip Tech · I/O Expanders · SSOP-20-208mil

MCP23008-E from Microchip Tech, in a SSOP-20-208mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 SCL/SCK input Serial clock input for the I2C (MCP23008) or SPI (MCP23S08) interface.
2 SDA/SI bidirectional Serial data I/O for MCP23008 (I2C) or serial data input for MCP23S08 (SPI).
3 A2/SO bidirectional Hardware address input (MCP23008) or serial data output (MCP23S08); A2 must be biased externally.
4 A1 input Hardware address input that must be biased externally.
5 A0 input Hardware address input that must be biased externally.
6 RESET input External reset input that must be biased externally.
7 NC/CS input No connect on the MCP23008; external chip select input on the MCP23S08.
8 INT output Interrupt output that can be configured as active-high, active-low or open-drain.
9 VSS power_in Ground reference for the device.
10 N/C unconnected No connect pin on the SSOP package.
11 N/C unconnected No connect pin on the SSOP package.
12 GP0 bidirectional Bidirectional I/O pin that can be enabled for interrupt-on-change and/or an internal weak pull-up resistor.
13 GP1 bidirectional Bidirectional I/O pin that can be enabled for interrupt-on-change and/or an internal weak pull-up resistor.
14 GP2 bidirectional Bidirectional I/O pin that can be enabled for interrupt-on-change and/or an internal weak pull-up resistor.
15 GP3 bidirectional Bidirectional I/O pin that can be enabled for interrupt-on-change and/or an internal weak pull-up resistor.
16 GP4 bidirectional Bidirectional I/O pin that can be enabled for interrupt-on-change and/or an internal weak pull-up resistor.
17 GP5 bidirectional Bidirectional I/O pin that can be enabled for interrupt-on-change and/or an internal weak pull-up resistor.
18 GP6 bidirectional Bidirectional I/O pin that can be enabled for interrupt-on-change and/or an internal weak pull-up resistor.
19 GP7 bidirectional Bidirectional I/O pin that can be enabled for interrupt-on-change and/or an internal weak pull-up resistor.
20 VDD power_in Power supply pin.

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package SSOP-20-208mil
Category Interface
Pins 20

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Ambient temperature under bias -40 125 °C 23
Storage temperature -65 150 °C 23
Voltage on VDD with respect to VSS -0.3 5.5 V 23
Voltage on all other pins with respect to VSS (except VDD) -0.6 V max printed as (VDD + 0.6V) 23
Maximum current out of VSS pin 150 mA 23
Maximum current into VDD pin 125 mA 23
Input clamp current IIK -20 20 mA VI < 0 or VI > VDD 23
Output clamp current IOK -20 20 mA VO < 0 or VO > VDD 23
Operating supply voltage, I-Temp range VDD 1.8 5.5 V -40°C ≤ TA ≤ +85°C (I-Temp) 24
Operating supply voltage, E-Temp range VDD 4.5 5.5 V -40°C ≤ TA ≤ +125°C (E-Temp) (Note 1) 24
Operating ambient temperature, I-Temp range TA -40 85 °C 1.8V ≤ VDD ≤ 5.5V (I-Temp) 24
Operating ambient temperature, E-Temp range TA -40 125 °C 4.5V ≤ VDD ≤ 5.5V (E-Temp) (Note 1) 24
Supply Voltage VDD 1.8 5.5 V 24
VDD Rise Rate to Ensure Power-on Reset SVDD 0.05 V/ms Design guidance only. Not tested. 24
Supply Current IDD 1 mA SCL/SCK = 1 MHz 24
Standby current IDDS 1 µA 24
Standby current IDDS 2 µA 4.5V - 5.5V @ +125°C (Note 1) 24
Input leakage current, I/O port pins IIL -1 1 µA VSS ≤ VPIN ≤ VDD 24
Output leakage current, I/O port pins ILO -1 1 µA VSS ≤ VPIN ≤ VDD 24
GPIO weak pull-up current IPU 40 75 115 µA VDD = 5V, GP Pins = VSS; -40°C ≤ TA ≤ +85°C 24
Output Low-Voltage, GPIO VOL 0.6 V IOL = 8.5 mA, VDD = 4.5V 24
Output Low-Voltage, INT VOL 0.6 V IOL = 1.6 mA, VDD = 4.5V 24
Output Low-Voltage, SO and SDA VOL 0.6 V IOL = 3.0 mA, VDD = 1.8V 24
Output Low-Voltage, SDA VOL 0.8 V IOL = 3.0 mA, VDD = 4.5V 24
Capacitive loading, GPIO, SO, INT pins CIO 50 pF 24
Capacitive loading, SDA pin CB 400 pF 24
RESET Pulse Width (Low) TRSTL 1 µs 26
Output High-Impedance From RESET Low TIOZ 1 µs 26
Clock High Time, 100 kHz mode THIGH 4 µs RPU (SCL, SDA) = 1 kΩ, CL (SCL, SDA) = 135 pF; 1.8V, 5.5V (I-Temp) 27
Clock High Time, 400 kHz mode THIGH 0.6 µs RPU (SCL, SDA) = 1 kΩ, CL (SCL, SDA) = 135 pF; 2.7V, 5.5V (I-Temp) 27
Clock High Time, 1.7 MHz mode THIGH 0.12 µs RPU (SCL, SDA) = 1 kΩ, CL (SCL, SDA) = 135 pF; 4.5V, 5.5V (E-Temp) 27
Clock Low Time, 100 kHz mode TLOW 4.7 µs RPU (SCL, SDA) = 1 kΩ, CL (SCL, SDA) = 135 pF; 1.8V, 5.5V (I-Temp) 27
Clock Low Time, 400 kHz mode TLOW 1.3 µs RPU (SCL, SDA) = 1 kΩ, CL (SCL, SDA) = 135 pF; 2.7V, 5.5V (I-Temp) 27
Clock Low Time, 1.7 MHz mode TLOW 0.32 µs RPU (SCL, SDA) = 1 kΩ, CL (SCL, SDA) = 135 pF; 4.5V, 5.5V (E-Temp) 27
SDA and SCL Rise Time, 100 kHz mode TR 1000 ns RPU (SCL, SDA) = 1 kΩ, CL (SCL, SDA) = 135 pF; 1.8V, 5.5V (I-Temp) (Note 1) 27
SDA and SCL Rise Time, 400 kHz mode TR 300 ns RPU (SCL, SDA) = 1 kΩ, CL (SCL, SDA) = 135 pF; 2.7V, 5.5V (I-Temp) (Note 1) 27
SDA and SCL Rise Time, 1.7 MHz mode TR 20 160 ns RPU (SCL, SDA) = 1 kΩ, CL (SCL, SDA) = 135 pF; 4.5V, 5.5V (E-Temp) (Note 1) 27
Data Input Hold Time, 100 kHz mode THD:DAT 0 3.45 µs RPU (SCL, SDA) = 1 kΩ, CL (SCL, SDA) = 135 pF; 1.8V, 5.5V (I-Temp) 27
Data Input Hold Time, 400 kHz mode THD:DAT 0 0.9 µs RPU (SCL, SDA) = 1 kΩ, CL (SCL, SDA) = 135 pF; 2.7V, 5.5V (I-Temp) 27
Data Input Hold Time, 1.7 MHz mode THD:DAT 0 0.15 µs RPU (SCL, SDA) = 1 kΩ, CL (SCL, SDA) = 135 pF; 4.5V, 5.5V (E-Temp) 27
Data Input Setup Time, 100 kHz mode TSU:DAT 250 ns RPU (SCL, SDA) = 1 kΩ, CL (SCL, SDA) = 135 pF; 1.8V, 5.5V (I-Temp) 27
Data Input Setup Time, 400 kHz mode TSU:DAT 100 ns RPU (SCL, SDA) = 1 kΩ, CL (SCL, SDA) = 135 pF; 2.7V, 5.5V (I-Temp) 27
Data Input Setup Time, 1.7 MHz mode TSU:DAT 0.01 µs RPU (SCL, SDA) = 1 kΩ, CL (SCL, SDA) = 135 pF; 4.5V, 5.5V (E-Temp) 27
Output Valid From Clock (TAA), 100 kHz mode TAA 3.45 µs RPU (SCL, SDA) = 1 kΩ, CL (SCL, SDA) = 135 pF; 1.8V, 5.5V (I-Temp) 28
Output Valid From Clock (TAA), 400 kHz mode TAA 0.9 µs RPU (SCL, SDA) = 1 kΩ, CL (SCL, SDA) = 135 pF; 2.7V, 5.5V (I-Temp) 28
Output Valid From Clock (TAA), 1.7 MHz mode TAA 0.18 µs RPU (SCL, SDA) = 1 kΩ, CL (SCL, SDA) = 135 pF; 4.5V, 5.5V (E-Temp) 28
Bus Free Time, 100 kHz mode TBUF 4.7 µs RPU (SCL, SDA) = 1 kΩ, CL (SCL, SDA) = 135 pF; 1.8V, 5.5V (I-Temp) 28
Bus Free Time, 400 kHz mode TBUF 1.3 µs RPU (SCL, SDA) = 1 kΩ, CL (SCL, SDA) = 135 pF; 2.7V, 5.5V (I-Temp) 28
Bus Capacitive Loading, 100 kHz and 400 kHz CB 400 pF (Note 1) 28
Bus Capacitive Loading, 1.7 MHz CB 100 pF (Note 1) 28
Serial data to output valid TGPOV 500 ns 31
Interrupt pin disable time TINTD 600 ns 31
GP input change to register valid TGPIV 450 ns 31
IOC event to INT active TGPINT 600 ns 31
Glitch Filter on GP Pins TGLITCH 150 ns 31

CAD (KiCad official)

  • Symbol: MCP23008-E
  • Footprint: Package_SO:SSOP-20_5.3x7.2mm_P0.65mm
  • 3D model: SSOP-20-208mil (KiCad packages3D, STEP)
  • 3D model files: mcp23008-e-etched.step / mcp23008-e-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mcp23008-e.step / mcp23008-e.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (44 pp, sha256 573ae3991f57d129, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF