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MCP2120-I

Public Made by Adom

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Microchip Tech Interface - Specialized, PDIP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentcommunication interface chip-uart-485-232mcp2120-ifactory-2.0.0extractor-text

Verified MCP2120-I

by Ray · last 30 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

30 Oct 2026RayPublished by the parts factory: tier mfr, 14 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: MCP2120-I · PDIP-14 · 14 pins
  • ✓copper: 14 copper pads, none touching another net
  • ✓datasheet: all 14 pin names found in the 36-page datasheet
  • •distributor (warn): no ['digikey', 'mouser'] number
  • ✓family: DIP-14_W7.62mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-h8co3l4c/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • ✓package_fit: height and body within the datasheet's package drawing (datasheet p.28)
  • ✓pads: 14 pins = 14 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 14 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ mcp2120-i.kicad_sym✓ mcp2120-i.kicad_mod✓ mcp2120-i.step
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Ray Publish 0.1.0 8a3dbbe 1d ago

MCP2120-I

Microchip Tech · Interface - Specialized · PDIP-14

MCP2120-I from Microchip Tech, in a PDIP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VDD power_in Positive supply for logic and I/O pins.
2 OSC1/CLKIN input Oscillator crystal input / external clock source input (CMOS compatible); external clock up to 20 MHz, DC minimum.
3 OSC2 output Oscillator crystal output.
4 RESET input Resets the device when held low (Schmitt Trigger input); minimum low pulse width 2000 ns at VDD = 5.0 V.
5 RXIR input Asynchronous receive input from the infrared transceiver (Schmitt Trigger input).
6 TXIR output Asynchronous transmit output to the infrared transceiver.
7 MODE input Selects the device mode (Data/Command) for Software Baud Rate operation (TTL compatible input).
8 BAUD2 input BAUD2:BAUD0 specify the baud rate of the device or whether it operates in Software Baud Rate mode (TTL compatible input).
9 BAUD1 input BAUD2:BAUD0 specify the baud rate of the device or whether it operates in Software Baud Rate mode (TTL compatible input).
10 BAUD0 input BAUD2:BAUD0 specify the baud rate of the device or whether it operates in Software Baud Rate mode (TTL compatible input).
11 RX output Asynchronous transmit output to the controller UART.
12 TX input Asynchronous receive input from the controller UART (TTL compatible input).
13 EN input Device enable input.
14 VSS power_in Ground reference for logic and I/O pins.

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package PDIP-14
Category Communication Interface Chip/UART/485/232
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Ambient Temperature under bias -40 125 °C 11
Storage Temperature -65 150 °C 11
Voltage on VDD with respect to VSS VDD 0 7 V 11
Voltage on RESET with respect to VSS RESET 0 14 V 11
Max. Current out of VSS pin 150 mA 11
Max. Current into VDD pin 125 mA 11
Input Clamp Current IIK -20 20 mA VI < 0 or VI > VDD 11
Output Clamp Current IOK -20 20 mA V0 < 0 or V0 > VDD 11
Supply Voltage VDD 2.5 5.5 V See Figure 4-1 13
RAM Data Retention Voltage VDR 2.5 V Device Oscillator/Clock stopped 13
VDD Rise Rate to ensure Power-on Reset SVDD 0.05 V/ms 13
Supply Current IDD 0.8 1.4 mA FOSC = 4 MHz, VDD = 5.5V 13
Supply Current IDD 0.6 1 mA FOSC = 4 MHz, VDD = 3.0V 13
Supply Current IDD 0.4 0.8 mA FOSC = 4 MHz, VDD = 2.5V 13
Supply Current IDD 3 7 mA FOSC = 10 MHz, VDD = 3.0V 13
Supply Current IDD 4 12 mA FOSC = 20 MHz, VDD = 4.5V 13
Supply Current IDD 4.5 16 mA FOSC = 20 MHz, VDD = 5.5V 13
Device Disabled Current IPD 0.25 4 µA VDD = 3.0V, 0°C ≤ TA ≤ +70°C 13
Device Disabled Current IPD 0.25 3 µA VDD = 2.5V, 0°C ≤ TA ≤ +70°C 13
Device Disabled Current IPD 0.4 5.5 µA VDD = 4.5V, 0°C ≤ TA ≤ +70°C 13
Device Disabled Current IPD 3 8 µA VDD = 5.5V, -40°C ≤ TA ≤ +85°C 13
Input Low Voltage, TTL buffer VIL 0.8 V For all 4.5 ≤ VDD ≤ 5.5V 14
Input High Voltage, TTL buffer VIH 2 V 4.5 ≤ VDD ≤ 5.5V 14
Input Leakage Current, input pins IIL -1 1 µA VSS ≤ VPIN ≤ VDD, Pin at hi-impedance 14
Input Leakage Current, RESET IIL -30 30 µA VSS ≤ VPIN ≤ VDD 14
Input Leakage Current, OSC1 IIL -5 5 µA VSS ≤ VPIN ≤ VDD, XT, HS and LP osc configuration 14
Weak pull-up current Ipur 50 250 400 µA VDD = 5V, VPIN = VSS 14
Output Low Voltage TXIR, RX VOL 0.6 V IOL = 8.5 mA, VDD = 4.5V, -40°C to +85°C 15
Output Low Voltage OSC2 VOL 0.6 V IOL = 1.6 mA, VDD = 4.5V, -40°C to +85°C 15
OSC2 pin capacitive loading COSC2 15 pF when external clock is used to drive OSC1. 15
All Input or Output pins capacitive loading CIO 50 pF 15
External CLKIN Period TOSC 50 ns 17
Oscillator Period TOSC 50 500 ns 17
Oscillator Frequency FOSC 2 20 MHz 17
External CLKIN Frequency FOSC 20 MHz 17
Clock Error ECLK 0.01 % 17
Clock in (OSC1) Low or High Time TosL, TosH 10 ns 17
Clock in (OSC1) Rise or Fall Time TosR, TosF 15 ns 17
OSC1↑ (Q1 cycle) to Output valid TosH2ioV 100 ns 18
OSC1↑ (Q2 cycle) to Input invalid (I/O in hold time) TosH2ioI 200 ns 18
Input valid to OSC1↑ (I/O in setup time) TioV2osH 0 ns 18
RX and TXIR pin rise time ToR 10 25 ns 18
RX and TXIR pin fall time ToF 10 25 ns 18
RESET Pulse Width (low) TRSTL 2000 ns VDD = 5.0 V 19
Low Power Time-out Period TLPT 9 18 30 ms VDD = 5.0 V 19
Device Reset Timer Period TDRT 9 18 30 ms VDD = 5.0 V 19
Output Hi-impedance from RESET Low or device Reset TioZ 2 µs 19
Transmit (TX pin) Baud rate Error (into MCP2120) ETXBIT -1 1 % 20
Transmit (TXIR pin) Baud rate Error (out of MCP2120) ETXIRBIT -1 1 % 20
TX pin rise time and fall time TTXRF 25 ns 20
Receive (RXIR pin) Baud rate Error (into MCP2120) ERXBIT -1 1 % 21
Receive (RX pin) Baud rate Error (out of MCP2120) ERXBIT -1 1 % 21
RX pin rise time and fall time TTXRF 25 ns 21
TX edge to RX edge (delay) TTXE2RXE 5.5 8 10.5 TBITCLK 24

CAD (KiCad official)

  • Symbol: MCP2120-I
  • Footprint: Package_DIP:DIP-14_W7.62mm
  • 3D model: PDIP-14 (KiCad packages3D, STEP)
  • 3D model files: mcp2120-i-etched.step / mcp2120-i-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mcp2120-i.step / mcp2120-i.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (36 pp, sha256 084e618aaa15a6a8, retrieved 2026-10-30, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF