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MCP2021A-330E

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Microchip Tech LIN Transceivers, DFN-8-EP(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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MCP2021A-330E

Microchip Tech · LIN Transceivers · DFN-8-EP(4x4)

MCP2021A-330E from Microchip Tech, in a DFN-8-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 RXD output Receive Data Output, a standard CMOS output that follows the state of the LBUS pin.
2 CS/LWAKE input Chip Select and Local Wake-up Input (TTL level, high-voltage tolerant) that controls device state transitions, with an internal pull-down (~600 kΩ when high, ~300 kΩ when low); should not be tied directly to VREG.
3 VREG power_out Voltage regulator output, an on-chip LDO giving +3.3V (for the -330 option) at 70 mA regulated voltage.
4 TXD input Transmit Data Input (TTL level, HV-compliant up to 30V, adaptive pull-up to ~4.2V); LBUS is dominant when TXD is low and recessive when high.
5 VSS power_in Ground pin.
6 LBUS bidirectional LIN bus bidirectional interface pin, open-collector output with current limitation and controlled slopes, with a 160 kHz first-order low-pass input filter.
7 VBB power_in Battery positive supply voltage pin, with an external series diode to prevent reverse powering.
8 FAULT/TXE bidirectional Fault Detect Output/Transmitter Enable Input, HV-tolerant open-drain output up to 30V; a low level places the device in Transmitter Off mode, and a 10 kΩ external pull-up is recommended.
9 EP passive Exposed thermal pad; the datasheet gives no electrical connection requirement in the provided text.

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package DFN-8-EP(4x4)
Category Communication Interface Chip/UART/485/232
Pins 9

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
VBB Quiescent Operating Current IBBQ 200 µA IOUT = 0 mA, LBUS recessive, VREG = 3.3V 16
VBB Ready Current IBBRD 100 µA IOUT = 0 mA, LBUS recessive, VREG = 3.3V 16
VBB Transmitter-Off Current IBBTO 100 µA With voltage regulator on, transmitter off, receiver on, FAULT/TXE = VIL, CS = VIH, VREG = 3.3V 16
VBB Power-Down Current IBBPD 4.5 8 µA With voltage regulator off, receiver on and transmitter off, FAULT/TXE = VIH, TXD = VIH, CS = VIL 16
VBB Current with VSS Floating IBBNOGND -1 1 mA VBB = 12V, GND to VBB, VLIN = 0, 18V 16
High-Level Input Voltage (TXD, FAULT/TXE) VIH 2 V Max printed VREG +0.3 16
Low-Level Input Voltage (TXD, FAULT/TXE) VIL -0.3 0.8 V 16
High-Level Input Current (TXD, FAULT/TXE) IIH -2.5 0.4 µA Input voltage = 4.0V, ~800 k internal adaptive pull-up 16
Low-Level Input Current (TXD, FAULT/TXE) IIL -10 µA Input voltage = 0.5V, ~800 k internal adaptive pull-up 16
High-Level Input Voltage (CS/LWAKE) VIH 2 V Through a current-limiting resistor; max printed VBB 16
Low-Level Input Voltage (CS/LWAKE) VIL -0.3 0.8 V 16
High-Level Input Current (CS/LWAKE) IIH 8 µA Input voltage = 0.8VREG, ~1.3 M internal pull-down to VSS 17
Low-Level Input Current (CS/LWAKE) IIL 5 µA Input voltage = 0.2VREG, ~1.3 M internal pull-down to VSS 17
Low-Level Output Voltage (RXD) VOLRXD 0.2 V IOL = 2 mA; max printed 0.2VREG 17
High-Level Output Voltage (RXD) VOHRXD 0.8 V IOH = 2 mA; min printed 0.8VREG 17
Low-Level Output Voltage (FAULT/TXE) VOLOD 1 V IOL = 4 mA 17
Low-Level Output Voltage (RESET) VOLRST 1 V IOL = 4 mA 17
LBUS High-Level Input Voltage VIH(LBUS) 0.6 V Recessive state; min printed 0.6 VBB 17
LBUS Low-Level Input Voltage VIL(LBUS) -8 0.4 V Dominant state; max printed 0.4 VBB 17
LBUS Input Hysteresis VHYS 0.175 V VIH(LBUS)-VIL(LBUS); max printed 0.175 VBB 17
LBUS Low-Level Output Current IOL(LBUS) 40 200 mA Output voltage = 0.1 VBB, VBB = 12V 17
Pull-Up Current on Input IPU(LBUS) -180 -72 µA ~30 k internal pull-up @ VIH(LBUS) = 0.7 VBB, VBB = 12V 17
Short Circuit Current Limit ISC 50 200 mA Note 1 17
LBUS High-Level Output Voltage VOH(LBUS) 0.8 V min printed 0.8 VBB, max VBB 17
Driver Dominant Voltage V_LOSUP 1.1 V VBB = 7.3V, RLOAD = 1000 17
Driver Dominant Voltage V_HISUP 1.2 V VBB = 18V, RLOAD = 1000 17
Input Leakage Current (dominant bus level) IBUS_PAS_DOM -1 mA Driver off, VBUS = 0V, VBB = 12V 17
Input Leakage Current (recessive bus level) IBUS_PAS_REC -20 20 µA Driver off, 8V < VBB < 18V, 8V < VBUS < 18V, VBUS ≥ VBB 17
Leakage Current (disconnected from ground) IBUS_NO_GND -10 10 µA GNDDEVICE = VBB, 0V < VBUS < 18V, VBB = 12V 17
Leakage Current (disconnected from VBB) IBUS_NO_PWR -10 10 µA VBB = GND, 0<VBUS < 18V 17
Receiver Center Voltage VBUS_CNT 0.475 0.5 0.525 V VBUS_CNT = (VIL(LBUS)+VIH(LBUS))/2; values printed as x VBB 17
Slave Termination RSLAVE 20 30 47 kΩ Note 2 17
Capacitance of Slave Node CSLAVE 50 pF Note 2 18
Wake-Up Voltage Threshold on LIN Bus VWK(LBUS) 3.4 V Wake-up from Power-Down mode (Note 3) 18
Output Voltage 3.3V VREG 3.2 3.3 3.4 V 0 mA < IOUT < 70 mA 18
Line Regulation 3.3V VOUT1 10 50 mV IOUT = 1 mA, 6.0V < VBB < 18V 18
Load Regulation 3.3V VOUT2 10 50 mV 5 mA < IOUT < 70 mA, 6.0V < VBB < 12V 18
Power Supply Ripple Reject 3.3V PSRR 50 dB 1 VPP @ 10, 20 kHz, ILOAD = 20 mA 18
Output Noise Voltage 3.3V eN 100 µVRMS/Hz 10 Hz, 40 MHz, CFILTER = 10 µf, CBP = 0.1 µf, ILOAD = 20 mA 18
Shutdown Voltage Threshold 3.3V VSD 2.5 2.7 V See Figure 1-5 (Note 2) 18
Input Voltage to Turn-Off Output 3.3V VOFF 3.9 4.5 V 18
Input Voltage to Turn-On Output 3.3V VON 5.25 6 V 18
Slope Rising and Falling Edges tSLOPE 3.5 22.5 µs 7.3V ≤ VBB ≤ 18V 20
Propagation Delay of Transmitter tTRANSPD 5 µs tTRANSPD = max.(tTRANSPDR or tTRANSPDF) 20
Propagation Delay of Receiver tRECPD 6 µs tRECPD = max.(tRECPDR or tRECPDF) 20
Symmetry of Propagation Delay of Receiver tRECSYM -2 2 µs RRXD = 2.4 k to VCC, CRXD = 20 pF 20
Symmetry of Propagation Delay of Transmitter tTRANSSYM -2 2 µs tTRANSSYM = max.(tTRANSPDF -tTRANSPDR) 20
Bus Dominant Time-Out Time tTO(LIN) 25 ms 20
Time to Sample FAULT/TXE for Bus Conflict Reporting tFAULT 32.5 µs tFAULT = max.(tTRANSPD +tSLOPE +tRECPD) 20
Duty Cycle 1 @ 20.0 kbps D1 0.396 %tBIT THREC(MAX) = 0.744 x VBB, THDOM(MAX) = 0.581 x VBB, VBB = 7.0V, 18V; tBIT = 50 µs 20
Duty Cycle 2 @ 20.0 kbps D2 0.581 %tBIT THREC(MAX) = 0.284 x VBB, THDOM(MAX) = 0.422 x VBB, VBB = 7.6V, 18V; tBIT = 50 µs 20
Duty Cycle 3 @ 10.4 kbps D3 0.417 %tBIT THREC(MAX) = 0.778 x VBB, THDOM(MAX) = 0.616 x VBB, VBB = 7.0V, 18V; tBIT = 96 µs 20
Duty Cycle 4 @ 10.4 kbps D4 0.59 %tBIT THREC(MAX) = 0.251 x VBB, THDOM(MAX) = 0.389 x VBB, VBB = 7.6V, 18V; tBIT = 96 µs 21
Bus Activity Debounce time tBDB 30 80 250 µs 21
Bus Activity to Voltage Regulator Enabled tBACTIVE 35 200 µs 21
Voltage Regulator Enabled to Ready tVEVR 300 1200 µs Note 1 21
Chip Select to Ready Mode tCSR 230 µs 21
Chip Select to Power-Down tCSPD 330 µs Note 2 21
Short Circuit to Shutdown tSHUTDOWN 20 100 µs 21
Thermal Resistance, 8L-DFN θJA 48 °C/W 21
Maximum Junction Temperature TJ 150 °C 15

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts tin f) MCP2021A-500E/P: 5.0V, 8-lead PDIP package g) MCP2021A-330E/SN: 3.3V, 8-lead SOIC package 44

CAD (KiCad official)

  • Symbol: MCP2021A-330E
  • Footprint: Package_DFN_QFN:DFN-8-1EP_4x4mm_P0.8mm_EP2.5x3.6mm
  • 3D model: DFN-8-EP(4x4) (KiCad packages3D, STEP)
  • 3D model files: mcp2021a-330e-etched.step / mcp2021a-330e-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mcp2021a-330e.step / mcp2021a-330e.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (46 pp, sha256 4611d37e30ee6ed5, retrieved 2026-10-26, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF