MCP1824T-3302E

{
  "slug": "mcp1824t-3302e",
  "version": "0.1.0",
  "type": "component",
  "description": "Microchip Tech Linear Voltage Regulators (LDO), SOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "power management ics",
    "mcp1824t-3302e",
    "factory-2.0.0",
    "extractor-text"
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  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
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    "README.md",
    "mcp1824t-3302e.kicad_sym",
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    "mcp1824t-3302e.glb",
    "mcp1824t-3302e.step",
    "mcp1824t-3302e.lbr",
    "docs/hero.png",
    "docs/mcp1824t-3302e-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "mcp1824t-3302e-hero.glb",
    "mcp1824t-3302e-hero.overlay.json",
    "mcp1824t-3302e-etched.glb"
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  "component": {
    "mpn": "MCP1824T-3302E",
    "manufacturer": "Microchip Tech",
    "package": "SOT-23-5",
    "pin_count": 5,
    "category": "Power Management ICs",
    "subcategory": "Linear Voltage Regulators (LDO)",
    "datasheet": "https://ww1.microchip.com/downloads/en/DeviceDoc/22070a.pdf",
    "parts": {
      "symbol": "mcp1824t-3302e.kicad_sym",
      "footprint": "mcp1824t-3302e.kicad_mod",
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      "lbr": "mcp1824t-3302e.lbr"
    },
    "distributor_links": {
      "lcsc": "C83261"
    },
    "distributor_check": {
      "checked_at": "2026-10-23T06:04:14Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": null,
        "status": "no match"
      },
      "mouser": {
        "pn": null,
        "status": "no match"
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    },
    "pins": [
      {
        "number": "1",
        "name": "VIN",
        "type": "power_in",
        "description": "Input voltage supply for the unregulated or regulated source (operating range 2.1V to 6.0V), with a 1 µF to 10 µF input capacitor recommended if the source is far away or a battery."
      },
      {
        "number": "2",
        "name": "GND",
        "type": "power_in",
        "description": "Ground pin that conducts only the LDO ground current and should be tied to an electrically quiet circuit ground for best noise and PSRR."
      },
      {
        "number": "3",
        "name": "SHDN",
        "type": "input",
        "description": "Shutdown control input where a logic-high enables the LDO output and a logic-low disables it and drives PWRGD low, reducing quiescent current to a typical 0.1 µA."
      },
      {
        "number": "4",
        "name": "PWRGD",
        "type": "output",
        "description": "Open-drain power good output that indicates the output is within 92% (typical) of nominal regulation with 2% typical hysteresis and a fixed 110 µs (typical) delay."
      },
      {
        "number": "5",
        "name": "VOUT",
        "type": "power_out",
        "description": "Regulated output voltage (3.3V for this fixed version) requiring a minimum 1.0 µF output capacitance for stability."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
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        "extractor": "extract_pins 0.3",
        "primary_model": "claude-sonnet-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: Pin table text is garbled (VIN row printed '1 2 2 11'); SOT-23 fixed column interpreted as VIN=1, GN; Table 3-1 labels SHDN as 'active-low', but Section 3.1 says logic-high enables the output. Descripti; The datasheet text does not state PWRGD's open-drain pull-up limits. The type 'output' is chosen for"
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        "at": "2026-10-23T06:03:26"
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        "pages": 34,
        "sha256": "dda3986a6bed8be8",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 5,
        "described": 5,
        "cites_pages": true,
        "refuses_to_fabricate": true
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        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
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}