component
MCP1792T-5002H
Public Made by Adomby adom
Microchip Tech Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-23A-3. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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MCP1792T-5002H
Microchip Tech · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23A-3
MCP1792T-5002H from Microchip Tech, in a SOT-23A-3. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground pin; for optimal noise and PSRR it should be tied to an electrically quiet circuit ground, and for noisy inputs it should be tied to the return of the output capacitor. |
| 2 | VOUT | power_out | Regulated output voltage VR; a minimum output capacitance of 2.2 µF is required for stability, and the device is stable with ceramic capacitors. |
| 3 | VIN | power_in | Input voltage supply pin with an input operating voltage range of 4.5V to 55V; an input capacitance of 2.2 µF to 10 µF is recommended for most applications, such as with batteries or long leads. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SOT-23A-3 |
| Category | Power Management (PMIC) |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Operating Voltage | VIN | 4.5 | 55 | V | 3 | ||
| Output Voltage Range (tolerance, TA -40°C to +85°C) | VOUT | -2 | 2 | % | TA of -40°C to +85°C | 3 | |
| Output Voltage Range (tolerance, TA -40°C to +150°C) | VOUT | -3 | 3 | % | TA of -40°C to +150°C | 3 | |
| Input Quiescent Current | IQ | 25 | 45 | µA | IOUT = 0A | 3 | |
| Input Quiescent Current for SHDN Mode | ISHDN | 2 | 12 | µA | SHDN = GND, VIN = 55V | 3 | |
| Ground Current | IGND | 100 | 150 | µA | IOUT = 100 mA | 3 | |
| Maximum Continuous Output Current | IOUT | 100 | mA | Note 2 | 3 | ||
| Foldback Current Corner | IOUT_SC | 230 | 370 | mA | VIN ≤ 55V, Note 5 | 3 | |
| Line Regulation | VOUT/(VOUT x VIN) | -0.05 | 0.0002 | 0.05 | %/V | 4.5V < VIN < 55V, 6.2V < VIN < 55V | 4 |
| Load Regulation (TA -40°C to +85°C) | VOUT/VOUT | -1 | 0.2 | 1 | % | IOUT = 1 mA to 100 mA, TA of -40°C to +85°C | 4 |
| Load Regulation (TA -40°C to +150°C) | VOUT/VOUT | -2 | 0.2 | 2 | % | IOUT = 1 mA to 100 mA, TA of -40°C to +150°C | 4 |
| Dropout Voltage (TA -40°C to +85°C) | VDROPOUT | 250 | 400 | mV | TA of -40°C to +85°C, IOUT = 100 mA | 4 | |
| Dropout Voltage (TA -40°C to +150°C) | VDROPOUT | 250 | 1200 | mV | TA of -40°C to +150°C, IOUT = 100 mA (Note 3) | 4 | |
| Shutdown Input Logic High | VSHDN-HIGH | 2.4 | V | 4 | |||
| Shutdown Input Logic Low | VSHDN-LOW | 0 | 0.8 | V | 4 | ||
| Shutdown Input Leakage Current | SHDNILK | 0.2 | 0.4 | µA | SHDN = GND, or SHDN = 6.2V | 4 | |
| Output Voltage Delay Time | TDELAY | 800 | 1200 | µs | VIN = 0 to 6.2V, VOUT = GND to 10% of VR, RLOAD = 50, Note 5 | 4 | |
| Input Voltage to Turn On Output (UVLO high) | VUVLO_High | 2.7 | V | VR = 3.3V, VR = 5.0V, rising VIN, VIN = 0 to VIN_MIN | 4 | ||
| Input Voltage to Turn Off Output (UVLO low) | VUVLO_Low | 2.4 | V | VR = 3.3V, VR = 5.0V, failing VIN, VIN = VIN_MIN to 0 | 4 | ||
| Output Rise Time | TRISE | 400 | µs | VIN = 0 to 6.2V, VOUT = 10% to 90% of VR, RLOAD = 50, Note 5 | 4 | ||
| Output Noise | eN | 400 | µVrms | f = 10 Hz to 100 kHz, VR = 3.3V, IOUT = 10 mA (Note 5) | 4 | ||
| Power Supply Ripple Rejection Ratio at 100 Hz | PSRR | 80 | dB | f = 100 Hz (Note 4, Note 5) | 4 | ||
| Power Supply Ripple Rejection Ratio at 100 kHz | PSRR | 55 | dB | f = 100 kHz (Note 4, Note 5) | 4 | ||
| Foldback Current | IFOLDBACK | 10 | mA | VOUT~0V, RLOAD ≥ 0.1; VIN ≤ 55V, Note 5 | 3 | ||
| Ground Current at low load | IGND | 25 | µA | IOUT = 1 mA | 3 | ||
| Thermal Shutdown | TSD | 175 | 181 | °C | Rising Temperature | 5 | |
| Thermal Shutdown Hysteresis | TSD | 15 | °C | Falling Temperature | 5 | ||
| Thermal Resistance, Junction to Air, SOT-23A-3LD | θJA | 147 | °C/W | JEDEC standard 4-layer FR4 board with 1 oz. copper | 5 | ||
| Thermal Resistance, Junction to Case, SOT-23A-3LD | θJC | 115 | °C/W | 5 | |||
| Input Voltage (absolute maximum) | 70 | V | 3 | ||||
| Maximum Voltage on VOUT- | VOUT- | 5.5 | V | 3 | |||
| Storage Temperature | TSTG | -55 | 175 | °C | 3 | ||
| Maximum Junction Temperature | TJ | 175 | °C | 3 | |||
| Operating Junction Temperature | TJ | -40 | 150 | °C | 3 | ||
| ESD protection HBM | 2 | kV | 3 | ||||
| ESD protection CDM | 750 | V | 3 | ||||
| ESD protection MM | 200 | V | 3 |
CAD (KiCad official)
- Symbol:
MCP1792T-5002H - Footprint:
Package_TO_SOT_SMD:SOT-23 - 3D model: SOT-23A-3 (KiCad packages3D, STEP)
- 3D model files:
mcp1792t-5002h-etched.step/mcp1792t-5002h-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mcp1792t-5002h.step/mcp1792t-5002h.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (34 pp, sha256
98464c4589491b9b, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).