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MCP16502TAC-E

Public Made by Adom

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Microchip Tech DC-DC Converters, VQFN-32(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentpower management (pmic)mcp16502tac-efactory-2.0.0extractor-text

Verified MCP16502TAC-E

by Ray · last 31 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

31 Oct 2026RayPublished by the parts factory: tier mfr, 33 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: MCP16502TAC-E · VQFN-32(5x5) · 33 pins
  • ✓copper: 33 copper pads, none touching another net
  • ✓datasheet: all 33 pin names found in the 86-page datasheet
  • •distributor (warn): no ['digikey', 'mouser'] number
  • ✓family: QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-ise4lwlx/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • ✓package_fit: height within the datasheet's package drawing (datasheet p.81)
  • ✓pads: 33 pins = 33 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 33 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ mcp16502tac-e.kicad_sym✓ mcp16502tac-e.kicad_mod✓ mcp16502tac-e.step
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Generated by kicad-footprint-generator · KiCad file format 20260206
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docs Publish 0.1.0 · Ray 6d ago
viewers mcp16502tac-e: viewers · Ray 6d ago
mcp16502tac-e-etched.glb Publish 0.1.0 · Ray 6d ago
mcp16502tac-e-etched.step mcp16502tac-e: factory component page (tier=mfr) · Ray 6d ago
mcp16502tac-e-hero.glb mcp16502tac-e: hero GLB from the etched model (keeps the MPN mark) · Ray 6d ago
mcp16502tac-e-hero.overlay.json Publish 0.1.0 · Ray 6d ago
mcp16502tac-e.glb Publish 0.1.0 · Ray 6d ago
mcp16502tac-e.kicad_mod Publish 0.1.0 · Ray 6d ago
mcp16502tac-e.kicad_sym Publish 0.1.0 · Ray 6d ago
mcp16502tac-e.lbr Publish 0.1.0 · Ray 6d ago
mcp16502tac-e.step Publish 0.1.0 · Ray 6d ago
package.json Publish 0.1.0 · Ray 6d ago
page.json Set visibility: public · Ray 6d ago
README.md Publish 0.1.0 · Ray 6d ago
verification.json Verified: Published by the parts factory: tier mfr, 33 pins · Ray 6d ago

MCP16502TAC-E

Microchip Tech · DC-DC Converters · VQFN-32(5x5)

MCP16502TAC-E from Microchip Tech, in a VQFN-32(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 nINTO output Active-low, open-drain interrupt output.
2 nRSTO output Active-low, open-drain reset output.
3 SGND power_in Signal ground; connect to reference ground plane.
4 SVIN power_in Input voltage for the analog control circuitry; decouple to SGND with a 1 µF (minimum) ceramic capacitor.
5 SDA bidirectional I2C interface serial data.
6 SCL input I2C interface serial clock.
7 nSTRTO output Active-low, open-drain start event output, asserted low whenever nSTRT is low.
8 PWRHLD input Power hold input, asserted high by the MPU to maintain power after start-up triggered by nSTRT and asserted low by the MPU to initiate a PMIC shutdown sequence.
9 OUT1 input Output sensing for Buck channel 1; connect to the regulation point for VOUT1.
10 PVIN1 power_in Power input voltage of Buck channel 1; connect a ceramic capacitor from PVIN1 to PGND1 to localize pulsed current loops and decouple switching noise.
11 SW1 power_out Switch node of Buck channel 1 with internal power MOSFET switches and external inductor connection.
12 PGND1 power_in Power ground of Buck channel 1.
13 PGND2 power_in Power ground of Buck channel 2.
14 SW2 power_out Switch node of Buck channel 2 with internal power MOSFET switches and external inductor connection.
15 PVIN2 power_in Power input voltage of Buck channel 2; connect a ceramic capacitor from PVIN2 to PGND2 to localize pulsed current loops and decouple switching noise.
16 OUT2 input Output sensing for Buck channel 2; connect to the regulation point for VOUT2.
17 SELV2 input Buck channel 2 output voltage selection, three-state input.
18 SELVL1 input LDO1 default output voltage selection, three-state input.
19 LOUT1 power_out LDO1 output; decouple to ground with a 2.2 µF (minimum) ceramic capacitor, default start-up state is ON and it can be disabled by I2C.
20 LVIN power_in Input voltage for LDO1 and LDO2; decouple to ground with a 2.2 µF (minimum) ceramic capacitor.
21 LOUT2 power_out LDO2 output; if in use, decouple to SGND with a 2.2 µF (minimum) ceramic capacitor.
22 LPM input Low-power mode input which, in combination with PWRHLD and HPM, defines the power mode status.
23 HPM input High-performance mode input which, in combination with PWRHLD and LPM, defines the power mode status; connect to ground if not used.
24 nSTRT input Start event input, internally pulled up; drive low to initiate a start-up sequence, and a capacitor can be added to auto-start when the main supply rises.
25 OUT3 input Output sensing for Buck channel 3; connect to the regulation point for VOUT3.
26 PVIN3 power_in Power input voltage of Buck channel 3; connect a ceramic capacitor from PVIN3 to PGND3 to localize pulsed current loops and decouple switching noise.
27 SW3 power_out Switch node of Buck channel 3 with internal power MOSFET switches and external inductor connection.
28 PGND3 power_in Power ground of Buck channel 3.
29 PGND4 power_in Power ground of Buck channel 4.
30 SW4 power_out Switch node of Buck channel 4 with internal power MOSFET switches and external inductor connection.
31 PVIN4 power_in Power input voltage of Buck channel 4; connect a ceramic capacitor from PVIN4 to PGND4 to localize pulsed current loops and decouple switching noise.
32 OUT4 input Output sensing for Buck channel 4; connect to the regulation point for VOUT4.
33 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package VQFN-32(5x5)
Category Power Management (PMIC)
Pins 33

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply Voltage Range VIN 2.7 5.5 V 5
Undervoltage Lockout Threshold VUVLO_TH 2.4 2.55 2.7 V Turn-on 5
Shutdown (OFF) Current ISHDN 7 11 µA PWRHLD = LPM = HPM = 0, nSTRT, nRSTO, nSTRTO, nINTO floating, VIN = 5.5V 5
Shutdown Current, TJ up to +105°C ISHDN_105 6 10 µA PWRHLD = LPM = HPM = 0, nSTRT, nRSTO, nSTRTO, nINTO floating, VIN = 4.5V, TJ = -40°C to +105°C 5
Hibernate Mode Non-Switching Quiescent Current IQNS_HIB 120 150 µA IOUT2 = 0 mA, Buck2 ON, all other channels OFF, VOUT2 >VOUT2_NOM, LPM = 1, PWRHLD = HPM = 0 5
Time Base Accuracy ACC_TB -10 10 % FSD[1:0] = 00, 01 6
Buck1 Input Operating Voltage Range VPVIN1 2.7 5.5 V 6
Buck1 Output Voltage Range VOUT1 1.2 3.7 V 50 mV steps 6
PVIN1 Shutdown Current IPVIN1_SHDN 0.05 2 µA Regulator disabled, VPVIN1 = 5V 6
Buck1 Output Voltage Accuracy, FPWM ACC_OUTPWM1 -2 2 % IOUT1 = 0 mA 6
Buck1 Output Voltage Accuracy, Auto-PFM ACC_OUTPFM1 -2 2 % IOUT1 = 0 mA, B1HCEN = 0 6
Hysteretic Control Mode Upper Regulation Threshold HCM_TH 1.7 2.9 4.3 % IOUT1 = 0 mA, PWRHLD = LPM = 1, HPM = 0, B1HCEN = 1, SVIN = PVIN1 = 1.06 VOUT1_NOM, OUT1 rising, % of VOUT1_NOM 7
Hysteretic Control Mode Enable Threshold HCM_EN 5 9 13 % IOUT1 = 0 mA, PWRHLD = LPM = 1, HPM = 0, B1HCEN = 1, SVIN = PVIN1 falling, % of VOUT1_NOM 7
Buck1 Switching Frequency fsw 1.8 2 2.2 MHz FPWM, FSD[1:0] = 00, 01 7
Buck1 High-Side Switch On-Resistance RDsonP1 140 160 mΩ PVIN1 = SVIN = 3.6V 7
Buck1 Low-Side Switch On-Resistance RDsonN1 120 140 mΩ PVIN1 = SVIN = 3.6V 7
Buck1 POK Threshold POK_TH1 90 92.5 95 % OUT1 rising, % of VOUT1_NOM 7
Buck1 Start-up POK Bypass Threshold VPOKB_TH_B1 360 400 440 mV PVIN1, OUT1, OUT1 rising, PVIN1 = 3.0V, VOUT1_NOM = 3.3V 7
Buck1 High-Side Peak Current Limit (Cycle by Cycle) ILIM_HS1 1.2 1.8 2.4 A 7
Buck1 Low-Side Negative Peak Current Limit (FPWM) ILIM_NEG1 -1.4 -1 -0.8 A 8
Buck1 Zero Current Detection Threshold IZCD1 0 50 110 mA 8
Buck2/3/4 Input Operating Voltage Range VPVINx 2.7 5.5 V 8
Buck2/3/4 Output Voltage Range VOUTx 0.6 1.85 V 25 mV steps 8
PVINx Shutdown Current IPVINx_SHDN 0.05 2 µA Regulator disabled, PVINx = 5V 8
Buck2/3/4 Output Voltage Accuracy, FPWM (0.9V to 1.3V) ACC_OUTPWMx -1 1 % IOUTx = 0 mA, 0.9V ≤ VOUTx ≤ 1.3V 8
Buck2/3/4 Output Voltage Accuracy, FPWM (outside 0.9V to 1.3V) ACC_OUTPWMx -1.5 1.5 % IOUTx = 0 mA, VOUTx < 0.9V or VOUTx > 1.3V 8
Buck2/3/4 Output Voltage Accuracy, Auto-PFM (0.9V to 1.3V) ACC_OUTPFMx -1 1 % IOUTx = 0 mA, 0.9V ≤ VOUTx ≤ 1.3V 8
Buck2/3/4 Output Voltage Accuracy, Auto-PFM (outside 0.9V to 1.3V) ACC_OUTPFMx -1.5 1.5 % IOUTx = 0 mA, VOUTx < 0.9V or VOUTx > 1.3V 8
Buck2/3/4 Switching Frequency fsw 1.8 2 2.2 MHz FPWM, FSD[1:0] = 00, 01 8
Buck2/3/4 High-Side Switch On-Resistance RDSonPx 140 160 mΩ PVINx = SVIN = 3.6V 8
Buck2/3/4 Low-Side Switch On-Resistance RDSonNx 120 140 mΩ PVINx = SVIN = 3.6V 8
Buck2/3/4 POK Threshold POK_THx 90 92.5 95 % OUTx rising, % of VOUTx(NOM) 8
Buck2/3/4 High-Side Peak Current Limit (Cycle-by-Cycle) ILIM_HSx 1.2 1.8 2.4 A 9
Buck2/3/4 Low-Side Negative Peak Current Limit (FPWM) ILIM_NEGx -1.4 -1 -0.8 A 9
Buck2/3/4 Zero Current Detection Threshold IZCDx 0 33 110 mA 9
LDO Input Operating Voltage Range VLVIN 2.7 5.5 V 9
LDO Output Voltage Range VLOUTx 1.2 3.7 V 9
LDO Stable Output Capacitor Range (150 mA) CLOUTx 2.2 20 µF ILOUT1,2 ≤ 150 mA, application requirement 9
LDO Stable Output Capacitor Range (300 mA) CLOUTx 4.7 20 µF ILOUT1,2 ≤ 300 mA, application requirement 9
LDO Output Voltage Accuracy ACC_LOUTx -2 2 % LVIN = SVIN = 3.6V, ILOUT1,2 = 0.1 mA 9
LDO Dropout Voltage VDOx 170 500 mV ILOUT1,2 = 300 mA 9
LDO POK Threshold POK_THL 90 92.3 95 % LOUT1,2 rising, % of VLOUT1,2(NOM) 10
LDO Start-up POK Bypass Threshold VPOKB_TH_Lx 400 500 600 mV LVIN, LOUTx, LOUTx rising, LVIN = 3.0V, VLOUTx_NOM = 3.3V 10
LDO Current Limit ILIM_LOUTx 310 420 550 mA SVIN = LVIN = 4.5V, VLOUT1,2 = 80% of nominal 10
SELV2, SELVL1 Low State Threshold Voltage VILT_SELVx 0.5 1 V 11
PWRHLD, LPM, HPM Logic High Input Voltage VIH_x 1.5 V SVIN = 3.6V-5.5V 11
PWRHLD, LPM, HPM Logic Low Input Voltage VIL_x 0.4 V SVIN = 3.6V-5.5V 11
nRSTO, nSTRTO, nINTO Output Voltage Low VOL_x 0.4 V SVIN = 3.6V-5.5V, IOL = 2 mA 11
SCL, SDA Logic High Input Voltage VIH_x 1.5 V SVIN = 3.6V-5.5V 11
SCL, SDA Logic Low Input Voltage VIL_x 0.4 V SVIN = 3.6V-5.5V 11
Operating Junction Temperature Range TJ -40 125 °C Steady state 11
Package Thermal Resistance θJA 25.8 °C/W 11
SVIN to SGND -0.3 6 V 5
Power Supply Voltage Pins PVINx to PGNDx -0.3 6 V 5
Power Supply Voltage Pins PVINx to SVIN -0.3 0.3 V 5
Maximum Junction Temperature 150 °C 5

CAD (KiCad official)

  • Symbol: MCP16502TAC-E
  • Footprint: Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm
  • 3D model: VQFN-32(5x5) (KiCad packages3D, STEP)
  • 3D model files: mcp16502tac-e-etched.step / mcp16502tac-e-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mcp16502tac-e.step / mcp16502tac-e.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (86 pp, sha256 817934d8538714e1, retrieved 2026-10-31, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF