# MCP16418-I

**Microchip Tech** · DC-DC Converters · MSOP-10

MCP16418-I from Microchip Tech, in a MSOP-10. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | UVLO | input | Undervoltage lockout input using a 0.485V internal reference and input to the low battery comparator; tie to VIN for the default 0.85V start-up threshold or use a resistive divider to raise UVLOSTART. |
| 2 | LBO | output | Open-drain low battery comparator output that is asserted low when the UVLO pin detects a level below the 485 mV threshold. |
| 3 | PG | output | Open-drain Power Good output (MCP16415/6/7/8 have Power Good only) that switches low when VOUT drops below 10% of its nominal value. |
| 4 | VFB | input | Feedback voltage pin for output regulation via a resistive divider, with a 0.97V reference voltage. |
| 5 | VOUT | power_out | Output voltage pin connecting the integrated synchronous P-channel MOSFET to the output capacitor, also used for the feedback divider. |
| 6 | SW | passive | Switch node for the boost inductor, carrying inductor current as high as 1A (typical). |
| 7 | PGND | power_in | Power ground return for the high-current N-channel switch, connected externally to SGND. |
| 8 | SGND | power_in | Signal ground return for the integrated reference and error amplifier, connected externally to PGND. |
| 9 | VIN | power_in | Input voltage pin (0.8V after start-up to 5.25V) requiring a local bypass capacitor of 10 µF minimum to GND. |
| 10 | EN | input | Enable control Schmitt-trigger input: high (>82% of VIN) enables, low (<25% of VIN) disables with 2.3 µA (typical) shutdown current, and it must not float. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | MSOP-10 |
| Category | Power Management (PMIC) |
| Pins | 10 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Voltage Range | VIN | 0.82 |  | 5.25 | V | Values apply for the entire VOUT range | 3 |
| Minimum Input Voltage for Start-up | VIN |  |  | 0.88 | V |  | 3 |
| UVLO Start threshold | UVLOSTART | 0.83 | 0.85 | 0.87 | V | Resistive load; UVLO pin connected to VIN pin | 3 |
| UVLO Stop threshold | UVLOSTOP | 0.74 | 0.8 | 0.81 | V | Resistive load; UVLO pin connected to VIN pin | 3 |
| Output Voltage Adjust Range | VOUT | 1.8 |  | 5.25 | V | Note 1 | 3 |
| Maximum Output Current | IOUT | 170 |  |  | mA | 1.2V VIN, 2.0V VOUT (Note 4) | 3 |
| Maximum Output Current | IOUT | 200 |  |  | mA | 1.5V VIN, 3.3V VOUT (Note 4) | 3 |
| Maximum Output Current | IOUT | 600 |  |  | mA | 3.6V VIN, 5.0V VOUT (Note 4) | 3 |
| Feedback Voltage | VFB | 0.95 | 0.97 | 0.985 | V | Note 3 | 3 |
| Quiescent Current, Shutdown Mode | IQSHDN |  | 2.3 | 3.1 | µA | VOUT = EN = GND, includes N-Channel and P-Channel switch leakage | 4 |
| NMOS Peak Switch Current Limit | IN(MAX) | 0.8 | 1 |  | A | Note 4 | 4 |
| VOUT Accuracy | VOUT% |  |  | 1 | % | Includes line and load regulation, VIN = 1.5V, PWM Only options | 4 |
| Line Regulation | ΔVOUT/VOUT/ΔVDD |  | 0.1 | 0.5 | %/V | VIN = 1.5V to 2.7V, IOUT = 25 mA, PWM Only options | 4 |
| Load Regulation | ΔVOUT/VOUT |  | 0.1 | 0.2 | % | IOUT = 10 mA to 100 mA, VIN = 1.5V, PWM Only options | 4 |
| Switching Frequency | fSW | 425 | 500 | 575 | kHz | IOUT = 100 mA | 4 |
| EN Input Logic High | VIH | 82 |  |  | % of VIN | IOUT = 10 mA | 4 |
| EN Input Logic Low | VIL |  |  | 25 | % of VIN | IOUT = 10 mA | 4 |
| Low Battery Input Hysteresis | LBIHYS |  | 20 | 40 | mV | UVLO pin | 4 |
| EN, VFB, VIN, VSW, VOUT to GND |  |  |  | 5.5 | V |  | 3 |
| Output Current Bypass Mode |  |  |  | 600 | mA |  | 3 |
| Storage Temperature |  | -65 |  | 150 | °C |  | 3 |
| Ambient Temperature with Power Applied |  | -40 |  | 85 | °C |  | 3 |
| Operating Junction Temperature | TJ | -40 |  | 125 | °C |  | 3 |
| ESD Protection, Human Body Model |  | 4 |  |  | kV | All pins, ≥ 4 kV | 3 |
| ESD Protection, Charged Device Model |  | 2 |  |  | kV | All pins, ≥ 2 kV | 3 |
| Operating Temperature Range | TJ | -40 |  | 125 | °C | Steady state | 5 |
| Storage Temperature Range | TA | -65 |  | 150 | °C |  | 5 |
| Maximum Junction Temperature | TJ |  |  | 150 | °C | Transient | 5 |
| Thermal Resistance, 10-Lead MSOP | θJA |  | 71 |  | °C/W |  | 5 |
| UVLO Hysteresis | UVLOHYS |  | 50 |  | mV |  | 3 |
| Feedback Input Bias Current | IVFB |  | 1 |  | nA | Note 4 | 3 |
| NMOS Switch On-Resistance | RDS(ON)N |  | 0.4 |  | Ω | ISW = 100 mA (Note 4) | 4 |
| PMOS Switch On-Resistance | RDS(ON)P |  | 0.5 |  | Ω | ISW = 100 mA (Note 4) | 4 |
| Maximum Duty Cycle | DCMAX |  | 90 |  | % | Note 4 | 4 |
| Thermal Shutdown Die Temperature | TSHDN |  | 140 |  | °C |  | 5 |
| Thermal Shutdown Temperature Hysteresis | TSHDNHYS |  | 10 |  | °C |  | 5 |

## CAD (KiCad official)

- Symbol: `MCP16418-I`
- Footprint: `Package_SO:MSOP-10_3x3mm_P0.5mm`
- 3D model: MSOP-10 (KiCad packages3D, STEP)
- 3D model files: `mcp16418-i-etched.step` / `mcp16418-i-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `mcp16418-i.step` / `mcp16418-i.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Microchip Tech datasheet](docs/mcp16418-i-datasheet.pdf) (44 pp, sha256 `dd533edd73721a88`, retrieved 2026-11-02, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/mcp16418-i-datasheet.pdf)