component
MCP1640CT-I
Public Made by Adomby adom
Microchip Tech DC-DC Converters, SOT-23-6. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
MCP1640CT-I
Microchip Tech · DC-DC Converters · SOT-23-6
MCP1640CT-I from Microchip Tech, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | SW | passive | Switch node and boost inductor input: connect the inductor from VIN to SW, which carries inductor current and can be as high as 800 mA peak. |
| 2 | GND | power_in | Ground return pin for circuit ground; keep the input cap return, output cap return and GND trace as short as possible to minimize noise on this pin. |
| 3 | EN | input | Logic-level enable input: a logic high above 90% of VIN enables the regulator output, and a logic low below 20% of VIN ensures it is disabled. |
| 4 | FB | input | Feedback voltage pin for output regulation through an external resistor divider; FB is 1.21 V typical with the output in regulation. |
| 5 | VOUT | power_out | Output voltage pin that connects the integrated P-Channel MOSFET to the output capacitor, and to which the FB voltage divider is connected for regulation. |
| 6 | VIN | power_in | Power supply input voltage pin, to be decoupled to GND with a 4.7 µF minimum capacitor. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SOT-23-6 |
| Category | Power Management (PMIC) |
| Pins | 6 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Minimum Start-Up Voltage | VIN | 0.65 | 0.8 | V | Note 1 | 3 | |
| Output Voltage Adjust Range | VOUT | 2 | 5.5 | V | VOUT VIN; Note 2 | 3 | |
| Maximum Output Current | IOUT | 100 | 150 | mA | 1.2V VIN, 2.0V VOUT | 3 | |
| Maximum Output Current | IOUT | 150 | mA | 1.5V VIN, 3.3V VOUT | 3 | ||
| Maximum Output Current | IOUT | 350 | mA | 3.3V VIN, 5.0V VOUT | 3 | ||
| Feedback Voltage | VFB | 1.175 | 1.21 | 1.245 | V | 3 | |
| Quiescent Current, PFM Mode | IQPFM | 19 | 30 | µA | Measured at VOUT = 4.0V; EN = VIN, IOUT = 0 mA; Note 3 | 3 | |
| Quiescent Current, Shutdown | IQSHDN | 0.7 | 2.3 | µA | VOUT = EN = GND; includes N-Channel and P-Channel switch leakage | 3 | |
| NMOS Switch Leakage | INLK | 0.3 | 1 | µA | VIN = VSW = 5V; VOUT = 5.5V VEN = VFB = GND | 3 | |
| PMOS Switch Leakage | IPLK | 0.05 | 0.2 | µA | VIN = VSW = GND; VOUT = 5.5V | 3 | |
| Voltage on EN, FB, VIN, VSW, VOUT to GND (absolute maximum) | 6.5 | V | 3 | ||||
| Voltage on EN, FB (absolute maximum) | -0.3 | V | Lower limit GND - 0.3V; upper limit greater of VOUT or VIN | 3 | |||
| Ambient Temperature with Power Applied (absolute maximum) | -40 | 85 | °C | 3 | |||
| ESD Protection HBM (absolute maximum) | 3 | kV | ESD protection on all pins, HBM | 3 | |||
| NMOS Peak Switch Current Limit | IN(MAX) | 600 | 850 | mA | Note 5 | 4 | |
| VOUT Accuracy | VOUT% | -3 | 3 | % | Includes line and load regulation; VIN = 1.5V | 4 | |
| Line Regulation | -1 | 0.01 | 1 | %/V | VIN = 1.5V to 3V; IOUT = 25 mA | 4 | |
| Load Regulation | -1 | 0.01 | 1 | % | IOUT = 25 mA to 100 mA; VIN = 1.5V | 4 | |
| Maximum Duty Cycle | DCMAX | 88 | 90 | % | 4 | ||
| Switching Frequency | fSW | 425 | 500 | 575 | kHz | 4 | |
| EN Input Logic High | VIH | 90 | % of VIN | IOUT = 1 mA | 4 | ||
| EN Input Logic Low | VIL | 20 | % of VIN | IOUT = 1 mA | 4 | ||
| Operating Junction Temperature Range | TJ | -40 | 125 | °C | Steady State | 4 | |
| Storage Temperature Range | TA | -65 | 150 | °C | 4 | ||
| Maximum Junction Temperature | TJ | 150 | °C | Transient | 4 | ||
| Thermal Resistance, 5L-TSOT23 (SOT-23-6) | JA | 192 | °C/W | EIA/JESD51-3 Standard | 4 |
CAD (KiCad official)
- Symbol:
MCP1640CT-I - Footprint:
Package_TO_SOT_SMD:SOT-23-6 - 3D model: SOT-23-6 (KiCad packages3D, STEP)
- 3D model files:
mcp1640ct-i-etched.step/mcp1640ct-i-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mcp1640ct-i.step/mcp1640ct-i.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (32 pp, sha256
ef5a64f77b0b2440, retrieved 2026-10-19, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# MCP1640CT-I
**Microchip Tech** · DC-DC Converters · SOT-23-6
MCP1640CT-I from Microchip Tech, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | SW | passive | Switch node and boost inductor input: connect the inductor from VIN to SW, which carries inductor current and can be as high as 800 mA peak. |
| 2 | GND | power_in | Ground return pin for circuit ground; keep the input cap return, output cap return and GND trace as short as possible to minimize noise on this pin. |
| 3 | EN | input | Logic-level enable input: a logic high above 90% of VIN enables the regulator output, and a logic low below 20% of VIN ensures it is disabled. |
| 4 | FB | input | Feedback voltage pin for output regulation through an external resistor divider; FB is 1.21 V typical with the output in regulation. |
| 5 | VOUT | power_out | Output voltage pin that connects the integrated P-Channel MOSFET to the output capacitor, and to which the FB voltage divider is connected for regulation. |
| 6 | VIN | power_in | Power supply input voltage pin, to be decoupled to GND with a 4.7 µF minimum capacitor. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SOT-23-6 |
| Category | Power Management (PMIC) |
| Pins | 6 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Minimum Start-Up Voltage | VIN | | 0.65 | 0.8 | V | Note 1 | 3 |
| Output Voltage Adjust Range | VOUT | 2 | | 5.5 | V | VOUT VIN; Note 2 | 3 |
| Maximum Output Current | IOUT | 100 | 150 | | mA | 1.2V VIN, 2.0V VOUT | 3 |
| Maximum Output Current | IOUT | 150 | | | mA | 1.5V VIN, 3.3V VOUT | 3 |
| Maximum Output Current | IOUT | 350 | | | mA | 3.3V VIN, 5.0V VOUT | 3 |
| Feedback Voltage | VFB | 1.175 | 1.21 | 1.245 | V | | 3 |
| Quiescent Current, PFM Mode | IQPFM | | 19 | 30 | µA | Measured at VOUT = 4.0V; EN = VIN, IOUT = 0 mA; Note 3 | 3 |
| Quiescent Current, Shutdown | IQSHDN | | 0.7 | 2.3 | µA | VOUT = EN = GND; includes N-Channel and P-Channel switch leakage | 3 |
| NMOS Switch Leakage | INLK | | 0.3 | 1 | µA | VIN = VSW = 5V; VOUT = 5.5V VEN = VFB = GND | 3 |
| PMOS Switch Leakage | IPLK | | 0.05 | 0.2 | µA | VIN = VSW = GND; VOUT = 5.5V | 3 |
| Voltage on EN, FB, VIN, VSW, VOUT to GND (absolute maximum) | | | | 6.5 | V | | 3 |
| Voltage on EN, FB (absolute maximum) | | -0.3 | | | V | Lower limit GND - 0.3V; upper limit greater of VOUT or VIN | 3 |
| Ambient Temperature with Power Applied (absolute maximum) | | -40 | | 85 | °C | | 3 |
| ESD Protection HBM (absolute maximum) | | | | 3 | kV | ESD protection on all pins, HBM | 3 |
| NMOS Peak Switch Current Limit | IN(MAX) | 600 | 850 | | mA | Note 5 | 4 |
| VOUT Accuracy | VOUT% | -3 | | 3 | % | Includes line and load regulation; VIN = 1.5V | 4 |
| Line Regulation | | -1 | 0.01 | 1 | %/V | VIN = 1.5V to 3V; IOUT = 25 mA | 4 |
| Load Regulation | | -1 | 0.01 | 1 | % | IOUT = 25 mA to 100 mA; VIN = 1.5V | 4 |
| Maximum Duty Cycle | DCMAX | 88 | 90 | | % | | 4 |
| Switching Frequency | fSW | 425 | 500 | 575 | kHz | | 4 |
| EN Input Logic High | VIH | 90 | | | % of VIN | IOUT = 1 mA | 4 |
| EN Input Logic Low | VIL | | | 20 | % of VIN | IOUT = 1 mA | 4 |
| Operating Junction Temperature Range | TJ | -40 | | 125 | °C | Steady State | 4 |
| Storage Temperature Range | TA | -65 | | 150 | °C | | 4 |
| Maximum Junction Temperature | TJ | | | 150 | °C | Transient | 4 |
| Thermal Resistance, 5L-TSOT23 (SOT-23-6) | JA | | 192 | | °C/W | EIA/JESD51-3 Standard | 4 |
## CAD (KiCad official)
- Symbol: `MCP1640CT-I`
- Footprint: `Package_TO_SOT_SMD:SOT-23-6`
- 3D model: SOT-23-6 (KiCad packages3D, STEP)
- 3D model files: `mcp1640ct-i-etched.step` / `mcp1640ct-i-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `mcp1640ct-i.step` / `mcp1640ct-i.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Microchip Tech datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588884964133228544) (32 pp, sha256 `ef5a64f77b0b2440`, retrieved 2026-10-19, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/mcp1640ct-i-datasheet.pdf)