component
MCP14700-E
Public Made by Adomby adom
Microchip Tech Pre-ordered Chips, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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{
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"component": {
"mpn": "MCP14700-E",
"manufacturer": "Microchip Tech",
"package": "SOIC-8",
"pin_count": 8,
"category": "Interface ICs",
"subcategory": "Pre-ordered Chips",
"datasheet": "https://datasheet.lcsc.com/datasheet/pdf/d1befe35938ab76a57bba6dda30e6913.pdf",
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"lbr": "mcp14700-e.lbr"
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"distributor_links": {
"lcsc": "C1549324"
},
"distributor_check": {
"checked_at": "2026-10-30T16:05:52Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": null,
"status": "no match"
},
"mouser": {
"pn": null,
"status": "no match"
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},
"pins": [
{
"number": "1",
"name": "PHASE",
"type": "passive",
"description": "Switch node that returns the high-side gate driver current and connects the high-side MOSFET source to the low-side MOSFET drain; VPHASE is limited to VBOOT - 7V to VBOOT + 0.3V."
},
{
"number": "2",
"name": "PWMHI",
"type": "input",
"description": "High-side PWM control input where a logic high drives HIGHDR high; the rising threshold is 1.40V to 1.80V and the falling threshold is 1.10V to 1.30V at VCC = 5.0V, and the pin is internally pulled low."
},
{
"number": "3",
"name": "PWMLO",
"type": "input",
"description": "Low-side PWM control input where a logic high drives LOWDR high; the rising threshold is 1.40V to 1.80V and the falling threshold is 1.10V to 1.30V at VCC = 5.0V, and the pin is internally pulled low."
},
{
"number": "4",
"name": "GND",
"type": "power_in",
"description": "Ground for the MCP14700 circuitry, which should have a low-impedance connection to the bias supply return because high peak currents flow out of this pin when the low-side MOSFET turns off."
},
{
"number": "5",
"name": "LOWDR",
"type": "output",
"description": "Low-side gate drive output that controls the low-side MOSFET, with VLOWDR limited to -0.3V to VCC + 0.3V and 2.0A typical source and 3.5A typical sink peak current."
},
{
"number": "6",
"name": "VCC",
"type": "power_in",
"description": "Supply input with an operating range of 4.5V to 5.5V (5.0V typical) and an absolute maximum of +7.0V, requiring a bypass capacitor placed as close as possible to this pin and GND."
},
{
"number": "7",
"name": "BOOT",
"type": "power_in",
"description": "Floating bootstrap supply for the high-side driver, rated to a maximum of +36.0V, with a bootstrap capacitor connected between this pin and PHASE."
},
{
"number": "8",
"name": "HIGHDR",
"type": "output",
"description": "High-side gate drive output that controls the high-side MOSFET, with VHIGHDR limited to VPHASE - 0.3V to VBOOT + 0.3V and 2.0A typical source and 2.0A typical sink peak current."
}
],
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"extractor": "extract_pins 0.3",
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"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: The SOIC pinout is taken from the pin function table (Table 3-1, SOIC column) and the SOIC package d; Pin types are KiCad classes assigned from the datasheet function descriptions; the datasheet does no; The datasheet text for the 3x3 DFN/SOIC table shows pin 6 as '6VCC' with a missing space; it is read"
],
"pages_sent": 28,
"cost_usd": 0.0771,
"at": "2026-10-30T16:05:33"
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"pages": 28,
"sha256": "084e557d6c8178d6",
"source_tier": "mfr"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 8,
"described": 8,
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"checked": "2026-10-30",
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"sha256": "a0f4972de7c6e42ad672b6433e0ac1710fe7a836a65ac6398ef82168dfa61e72",
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