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MCP1406-E

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Microchip Tech Gate Drivers, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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MCP1406-E

Microchip Tech · Gate Drivers · SOIC-8

MCP1406-E from Microchip Tech, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VDD power_in Bias supply input for the MOSFET driver with a voltage range of 4.5V to 18V, which must be decoupled to ground with local capacitors.
2 INPUT input High-impedance, TTL/CMOS-compatible control input with hysteresis between high and low levels, which withstands a negative swing up to 5V.
3 NC unconnected No connection; the pin is not connected internally in the 8-pin PDIP/SOIC package.
4 GND power_in Device return pin that should have a low-impedance connection to the bias supply source return; both GND pins must be used for proper operation.
5 GND power_in Device return pin that should have a low-impedance connection to the bias supply source return; both GND pins must be used for proper operation.
6 OUTPUT output CMOS push-pull output capable of sourcing peak currents of 6A at VDD = 18V with a reverse current latch-up rating of 1.5A; both OUTPUT pins must be used for proper operation.
7 OUTPUT output CMOS push-pull output capable of sourcing peak currents of 6A at VDD = 18V with a reverse current latch-up rating of 1.5A; both OUTPUT pins must be used for proper operation.
8 VDD power_in Bias supply input for the MOSFET driver with a voltage range of 4.5V to 18V; both VDD pins must be used for proper operation and decoupled to ground with local capacitors.

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package SOIC-8
Category Motor Driver ICs
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Logic '1', High Input Voltage VIH 2.4 1.8 V 4
Logic '0', Low Input Voltage VIL 1.3 0.8 V 4
Input Current IIN -10 10 µA 0V ≤ VIN ≤ VDD 4
Input Voltage VIN -5 V 4
Low Output Voltage VOL 0.025 V DC Test 4
Output Resistance, High ROH 2.1 2.8 Ω IOUT = 10 mA, VDD = 18V 4
Output Resistance, Low ROL 1.5 2.5 Ω IOUT = 10 mA, VDD = 18V 4
Rise Time tR 20 30 ns Figure 4-1, Figure 4-2; CL = 2500 pF 4
Fall Time tF 20 30 ns Figure 4-1, Figure 4-2; CL = 2500 pF 4
Delay Time tD1 40 55 ns Figure 4-1, Figure 4-2 4
Supply Voltage VDD 4.5 18 V 4
Power Supply Current IS 130 250 µA VIN = 3V 4
Power Supply Current IS 35 100 µA VIN = 0V 4
Logic '1', High Input Voltage (over operating temperature range) VIH 2.4 V 5
Logic '0', Low Input Voltage (over operating temperature range) VIL 0.8 V 5
Input Current (over operating temperature range) IIN -10 10 µA 0V ≤ VIN ≤ VDD 5
Input Voltage (over operating temperature range) VIN -5 V 5
Low Output Voltage (over operating temperature range) VOL 0.025 V DC TEST 5
Output Resistance, High (over operating temperature range) ROH 3 5 Ω IOUT = 10 mA, VDD = 18V 5
Output Resistance, Low (over operating temperature range) ROL 2.3 5 Ω IOUT = 10 mA, VDD = 18V 5
Rise Time (over operating temperature range) tR 25 40 ns Figure 4-1, Figure 4-2; CL = 2500 pF 5
Fall Time (over operating temperature range) tF 25 40 ns Figure 4-1, Figure 4-2; CL = 2500 pF 5
Delay Time (over operating temperature range) tD1 50 65 ns Figure 4-1, Figure 4-2 5
Supply Voltage (over operating temperature range) VDD 4.5 18 V 5
Power Supply Current (over operating temperature range) IS 200 500 µA VIN = 3V 5
Power Supply Current (over operating temperature range) IS 50 150 µA VIN = 0V 5
Specified Temperature Range TA -40 125 °C 6
Maximum Junction Temperature TJ 150 °C 6
Storage Temperature Range TA -65 150 °C 6
Supply Voltage 20 V 4
Input Voltage (absolute maximum, relative to GND) -5 V 4
Input Current 50 mA VIN > VDD 4
Peak Output Current IPK 6 A VDD ≥ 18V (Note 1) 4
Latch-Up Protection Withstand Reverse Current IREV 1.5 A Duty cycle ≤ 2%, t ≤ 300 µs 4
Junction-to-Ambient Thermal Resistance, 8-L SOIC JA 96.3 °C/W Note 1 6
Junction-to-Top Characterization Parameter, 8-L SOIC JT 3.2 °C/W Note 1 6
Junction-to-Board Characterization Parameter, 8-L SOIC JB 60.7 °C/W Note 1 6

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts tin 8-Lead (PDIP) SN = Plastic Small Outline - Narrow, 3.90 mm Body, 27

CAD (KiCad official)

  • Symbol: MCP1406-E
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: mcp1406-e-etched.step / mcp1406-e-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mcp1406-e.step / mcp1406-e.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (30 pp, sha256 63057f1872274b88, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF