component
MCP1320T-29LE
Public Made by Adomby adom
Microchip Tech Supervisor And Reset ICs, SOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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MCP1320T-29LE
Microchip Tech · Supervisor And Reset ICs · SOT-23-5
MCP1320T-29LE from Microchip Tech, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | RST | output | Active-low open-drain reset output that needs an external pull-up on the MCP1320 and goes low when VDD falls below VTRIP, when MR is forced low, when WDI sees no edge within the minimum time-out, or during power-up. |
| 2 | VSS | power_in | Ground reference for the device. |
| 3 | MR | input | Active-low manual reset input with an internal pull-up that forces a system reset when pulled to ground and filters noise pulses on the pin. |
| 4 | WDI | input | Watchdog timer input where an edge transition resets the counter and the first falling edge starts the timer, with a standard typical period of 1.6 s. |
| 5 | VDD | power_in | Positive supply input for the device, monitored against the trip voltage over a 1.0V to 5.5V range. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SOT-23-5 |
| Category | Power Management (PMIC) |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating Voltage Range | VDD | 1 | 5.5 | V | 3 | ||
| Specified VDD Value to VOUT Low | VDD | 1 | V | I RST = 10 µA, V RST < 0.3V | 3 | ||
| Operating Current (Watchdog Timer Active) | IDD | 5 | 10 | µA | Watchdog Timer Active | 3 | |
| Operating Current (Watchdog Timer Inactive) | IDD | 1 | 2 | µA | Watchdog Timer Inactive | 3 | |
| Operating Current (VDD < VTRIP) | IDD | 1 | 2 | µA | VDD < VTRIP | 3 | |
| Operating Current (Reset Delay Timer Active) | IDD | 5 | 10 | µA | Reset Delay Timer Active | 3 | |
| VDD Trip Point MCP13XX-29 | VTRIP | 2.857 | 2.9 | 2.944 | V | TA = +25°C (Note 1) | 4 |
| VDD Trip Point MCP13XX-29 | VTRIP | 2.828 | 2.9 | 2.973 | V | TA = -40°C to +125°C (Note 2) | 4 |
| Threshold Hysteresis MCP13XX-29 | VHYS | 0.029 | 0.174 | V | TA = +25°C (Note 3) | 6 | |
| VDD Trip Point Tempco | TTPCO | -40 | 40 | ppm/°C | 5 | ||
| RST/RST Low-Level Output Voltage | VOL | 0.3 | V | IOL = 50 µA, 1.0V VDD 1.5V | 8 | ||
| Input Low Voltage (MR and WDI pins) | VIL | 0.3 | x VDD | 8 | |||
| Input High Voltage (MR and WDI pins) | VIH | 0.7 | x VDD | 8 | |||
| Open-Drain High Voltage on Output | VODH | 13.5 | V | Open-Drain Output pin only, VDD = 3.0V, time voltage >5.5V applied 100 s, current into pin limited to 2 mA, +25°C operation recommended (Note 4, Note 5) | 8 | ||
| Input Leakage Current (MR and WDI) | IIL | -1 | 1 | µA | VSS VPIN VDD | 8 | |
| Open-Drain Output Leakage Current | IOD | 0.003 | 1 | µA | 8 | ||
| Output Pin Capacitive Loading (RST and RST) | CO | 50 | pF | This is the tester loading to meet the AC timing specifications. | 8 | ||
| Reset active time to RST/RST Inactive (Standard Time Out) | tRST | 140 | 200 | 280 | ms | Standard Time Out | 9 |
| MR Pulse Width | tMR | 1 | µs | 10 | |||
| WDI Pulse Width | tWP | 50 | ns | 10 | |||
| Watchdog Time-Out Period (Standard Time Out) | tWD | 1.12 | 1.6 | 2.4 | sec | Standard Time Out | 10 |
| Specified Temperature Range | TA | -40 | 125 | °C | Except MCP13XX-25 (or below) | 11 | |
| Thermal Resistance, 5L-SOT-23 | θJA | 220.7 | °C/W | 11 | |||
| Supply Voltage (VDD to VSS) | VDD | 7 | V | 3 | |||
| Input current (VDD) | 10 | mA | 3 | ||||
| Output current (RST) | 10 | mA | 3 | ||||
| Voltage on all inputs and outputs, except Open-Drain RST (with no internal pull-up resistor) | -0.6 | V | w.r.t. VSS | 3 | |||
| Voltage on Open-Drain RST (with no internal pull-up resistor) | -0.6 | 13.5 | V | w.r.t. VSS | 3 | ||
| Ambient temperature with power applied | TA | -40 | 125 | °C | 3 | ||
| Storage temperature | TSTG | -65 | 150 | °C | 3 | ||
| Maximum Junction temperature with power applied | TJ | 150 | °C | 3 |
CAD (KiCad official)
- Symbol:
MCP1320T-29LE - Footprint:
Package_TO_SOT_SMD:SOT-23-5 - 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files:
mcp1320t-29le-etched.step/mcp1320t-29le-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mcp1320t-29le.step/mcp1320t-29le.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (52 pp, sha256
b8834f2e897528dd, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).