component
MCP102T-195I
Public Made by Adomby adom
Microchip Tech Monitors & Reset Circuits, SOT-23. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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MCP102T-195I
Microchip Tech · Monitors & Reset Circuits · SOT-23
MCP102T-195I from Microchip Tech, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | RST | output | Active-low push-pull reset output that is low when VDD < VTRIP (falling) and high when VDD > VTRIP + VHYS (rising) after the reset power-up delay (120 ms typ). |
| 2 | VDD | power_in | Positive power supply, operating range 1.0V to 5.5V (absolute maximum 7.0V). |
| 3 | VSS | power_in | Ground reference. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SOT-23 |
| Category | Power Management ICs |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VDD Trip Point (MCP1XX-195) | VTRIP | 1.872 | 1.9 | 1.929 | V | TA = +25°C (Note 1) | 4 |
| VDD Trip Point (MCP1XX-195) | VTRIP | 1.853 | 1.9 | 1.948 | V | TA = -40°C to +85°C (Note 2) | 4 |
| Operating Voltage Range | VDD | 1 | 5.5 | V | 3 | ||
| Specified VDD Value to RST low | VDD | 1 | V | IRST = 10 µA, VRST < 0.2V | 3 | ||
| Operating Current (MCP102) | IDD | 1.75 | µA | Reset Power-up Timer (tRPU) Inactive | 3 | ||
| Operating Current (MCP102) | IDD | 20 | µA | Reset Power-up Timer (tRPU) Active | 3 | ||
| Threshold Hysteresis MCP1XX-195 | VHYS | 0.019 | 0.114 | V | TA = +25°C | 4 | |
| RST Low-level Output Voltage | VOL | 0.4 | V | IOL = 500 µA, VDD = VTRIP(MIN) | 4 | ||
| VDD Detect to RST Inactive | tRPU | 80 | 120 | 180 | ms | Figure 1-1 and CL = 50 pF | 5 |
| Specified Temperature Range (MCP1XX-195) | TA | -40 | 85 | ºC | MCP1XX-195 | 5 | |
| Maximum Junction Temperature | TJ | 150 | ºC | 5 | |||
| Storage Temperature Range | TA | -65 | 150 | ºC | 5 | ||
| Supply voltage VDD | VDD | 7 | V | 3 | |||
| Input current (VDD) | 10 | mA | 3 | ||||
| Output current (RST) | 10 | mA | 3 | ||||
| Rated Rise Time of VDD | 100 | V/µs | 3 | ||||
| RST output w.r.t. VSS | -0.6 | 13.5 | V | 3 | |||
| Storage temperature | -65 | 150 | °C | 3 | |||
| Ambient temperature with power applied | -40 | 125 | °C | 3 | |||
| Maximum Junction temperature with power applied | 150 | °C | 3 | ||||
| ESD protection on all pins | 2 | kV | 3 | ||||
| VDD Trip Point Tempco | TTPCO | 100 | ppm/°C | printed ±100 | 4 | ||
| VDD Detect to RST Active | tRPD | 130 | µs | VDD ramped from VTRIP(MAX) + 250 mV down to VTRIP(MIN), 250 mV, per Figure 1-1, CL = 50 pF (Note 1) | 5 | ||
| RST Rise Time After RST Active | tRT | 5 | µs | For RST 10% to 90% of final value per Figure 1-1, CL = 50 pF (Note 1) | 5 | ||
| Thermal Resistance, 3L-SOT-23 | θJA | 308 | ºC/W | 5 |
CAD (KiCad official)
- Symbol:
MCP102T-195I - Footprint:
Package_TO_SOT_SMD:SOT-23 - 3D model: SOT-23 (KiCad packages3D, STEP)
- 3D model files:
mcp102t-195i-etched.step/mcp102t-195i-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mcp102t-195i.step/mcp102t-195i.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (28 pp, sha256
46a5e4721c4ef577, retrieved 2026-10-27, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# MCP102T-195I
**Microchip Tech** · Monitors & Reset Circuits · SOT-23
MCP102T-195I from Microchip Tech, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | RST | output | Active-low push-pull reset output that is low when VDD < VTRIP (falling) and high when VDD > VTRIP + VHYS (rising) after the reset power-up delay (120 ms typ). |
| 2 | VDD | power_in | Positive power supply, operating range 1.0V to 5.5V (absolute maximum 7.0V). |
| 3 | VSS | power_in | Ground reference. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SOT-23 |
| Category | Power Management ICs |
| Pins | 3 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VDD Trip Point (MCP1XX-195) | VTRIP | 1.872 | 1.9 | 1.929 | V | TA = +25°C (Note 1) | 4 |
| VDD Trip Point (MCP1XX-195) | VTRIP | 1.853 | 1.9 | 1.948 | V | TA = -40°C to +85°C (Note 2) | 4 |
| Operating Voltage Range | VDD | 1 | | 5.5 | V | | 3 |
| Specified VDD Value to RST low | VDD | 1 | | | V | IRST = 10 µA, VRST < 0.2V | 3 |
| Operating Current (MCP102) | IDD | | | 1.75 | µA | Reset Power-up Timer (tRPU) Inactive | 3 |
| Operating Current (MCP102) | IDD | | | 20 | µA | Reset Power-up Timer (tRPU) Active | 3 |
| Threshold Hysteresis MCP1XX-195 | VHYS | 0.019 | | 0.114 | V | TA = +25°C | 4 |
| RST Low-level Output Voltage | VOL | | | 0.4 | V | IOL = 500 µA, VDD = VTRIP(MIN) | 4 |
| VDD Detect to RST Inactive | tRPU | 80 | 120 | 180 | ms | Figure 1-1 and CL = 50 pF | 5 |
| Specified Temperature Range (MCP1XX-195) | TA | -40 | | 85 | ºC | MCP1XX-195 | 5 |
| Maximum Junction Temperature | TJ | | | 150 | ºC | | 5 |
| Storage Temperature Range | TA | -65 | | 150 | ºC | | 5 |
| Supply voltage VDD | VDD | | | 7 | V | | 3 |
| Input current (VDD) | | | | 10 | mA | | 3 |
| Output current (RST) | | | | 10 | mA | | 3 |
| Rated Rise Time of VDD | | | | 100 | V/µs | | 3 |
| RST output w.r.t. VSS | | -0.6 | | 13.5 | V | | 3 |
| Storage temperature | | -65 | | 150 | °C | | 3 |
| Ambient temperature with power applied | | -40 | | 125 | °C | | 3 |
| Maximum Junction temperature with power applied | | | | 150 | °C | | 3 |
| ESD protection on all pins | | 2 | | | kV | | 3 |
| VDD Trip Point Tempco | TTPCO | | 100 | | ppm/°C | printed ±100 | 4 |
| VDD Detect to RST Active | tRPD | | 130 | | µs | VDD ramped from VTRIP(MAX) + 250 mV down to VTRIP(MIN), 250 mV, per Figure 1-1, CL = 50 pF (Note 1) | 5 |
| RST Rise Time After RST Active | tRT | | 5 | | µs | For RST 10% to 90% of final value per Figure 1-1, CL = 50 pF (Note 1) | 5 |
| Thermal Resistance, 3L-SOT-23 | θJA | | 308 | | ºC/W | | 5 |
## CAD (KiCad official)
- Symbol: `MCP102T-195I`
- Footprint: `Package_TO_SOT_SMD:SOT-23`
- 3D model: SOT-23 (KiCad packages3D, STEP)
- 3D model files: `mcp102t-195i-etched.step` / `mcp102t-195i-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `mcp102t-195i.step` / `mcp102t-195i.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Microchip Tech datasheet](docs/mcp102t-195i-datasheet.pdf) (28 pp, sha256 `46a5e4721c4ef577`, retrieved 2026-10-27, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/mcp102t-195i-datasheet.pdf)