# MC79M08CDTRKG

**onsemi** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · DPAK-3

MC79M08CDTRKG from onsemi, in a DPAK-3. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground pin; a common ground is required between the input and output voltages. |
| 2 | VI | power_in | Negative unregulated input, rated at −35 Vdc maximum, which must remain typically 1.1 V more negative than the output even at the high point of input ripple. |
| 3 | VO | power_out | Regulated negative fixed output of −8.0 V nominal (MC79M08); a 1.0 µF output capacitor is recommended to improve stability and transient response. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | DPAK-3 |
| Category | Power Management (PMIC) |
| Pins | 3 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Output Voltage (TJ = 25°C) | VO | -7.7 | -8 | -8.3 | Vdc | TJ = 25°C; VI = −10 V, IO = 350 mA (table header) | 3 |
| Output Voltage | VO | -7.6 | -8 | -8.4 | Vdc | −10.5 Vdc ≥ VI ≥ −25 Vdc, 5.0 mA ≤ IO ≤ 350 mA | 3 |
| Line Regulation, TJ = 25°C (sub-row 1) | Regline |  | 5 | 80 | mV | TJ = 25°C; −10.5 Vdc ≥ VI ≥ −25 Vdc | 3 |
| Line Regulation, TJ = 25°C (sub-row 2) | Regline |  | 3 | 50 | mV | TJ = 25°C; −11 Vdc ≥ VI ≥ −21 Vdc | 3 |
| Load Regulation, TJ = 25°C | Regload |  | 30 | 100 | mV | TJ = 25°C; 5.0 mA ≤ IO ≤ 500 mA | 3 |
| Input Bias Current (TJ = 25°C) | IIB |  |  | 8 | mA | TJ = 25°C | 3 |
| Input Bias Current Change (sub-row 1) | IIB |  |  | 0.4 | mA | −10.5 Vdc ≥ VI ≥ −25 Vdc, IO = 350 mA | 3 |
| Input Bias Current Change (sub-row 2) | IIB |  |  | 0.4 | mA | 5.0 mA ≤ IO ≤ 350 mA, VI = −10 V | 3 |
| Ripple Rejection | RR | 54 | 63 |  | dB | f = 120 Hz | 3 |
| Input Voltage | VI |  |  | -35 | Vdc |  | 2 |
| Thermal Resistance, Junction-to-Ambient, Case 369C (DPAK-3) | JA |  | 92 |  | °C/W | Case 369C (DPAK−3) | 2 |
| Thermal Resistance, Junction-to-Case, Case 369C (DPAK-3) | JC |  | 6 |  | °C/W | Case 369C (DPAK−3) | 2 |
| Storage Junction Temperature | Tstg | -65 |  | 150 | °C |  | 2 |
| Operating Junction Temperature Range | TJ | -40 |  | 150 | °C |  | 2 |

## CAD (KiCad official)

- Symbol: `MC79M08CDTRKG`
- Footprint: `Package_TO_SOT_SMD:TO-252-2`
- 3D model: DPAK-3 (KiCad packages3D, STEP)
- 3D model files: `mc79m08cdtrkg-etched.step` / `mc79m08cdtrkg-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `mc79m08cdtrkg.step` / `mc79m08cdtrkg.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [onsemi datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8586172255953440768) (9 pp, sha256 `cab487486a5292f6`, retrieved 2026-10-09, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/mc79m08cdtrkg-datasheet.pdf)