component
MC78M05ACDTRKG
Public Made by Adomby adom
onsemi Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, DPAK-3. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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MC78M05ACDTRKG
onsemi · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · DPAK-3
MC78M05ACDTRKG from onsemi, in a DPAK-3. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Input | power_in | Unregulated input voltage to the regulator; the absolute maximum input is 35 Vdc for the 5.0 V-18 V option, and a 0.33 µF or larger low-ESR bypass capacitor is recommended directly across the input when the supply filter is remote. |
| 2 | Ground | power_in | Common ground reference for the regulator; the heatsink surface (tab) is connected to this pin. |
| 3 | Output | power_out | Regulated 5.0 V output, rated for up to 500 mA with adequate heatsinking. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | DPAK-3 |
| Category | Power Management (PMIC) |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Output Voltage (TJ = 25°C) | VO | 4.9 | 5 | 5.1 | Vdc | TJ = 25°C | 2 |
| Output Voltage Variation | VO | 4.8 | 5.2 | Vdc | 7.0 Vdc ≤ VI ≤ 20 Vdc, 5.0 mA ≤ IO ≤ 350 mA | 2 | |
| Line Regulation | Regline | 3 | 50 | mV | TJ = 25°C, 7.0 Vdc ≤ VI ≤ 25 Vdc, IO = 200 mA | 2 | |
| Load Regulation | Regload | 20 | 100 | mV | TJ = 25°C, 5.0 mA ≤ IO ≤ 500 mA | 2 | |
| Load Regulation | Regload | 10 | 50 | mV | TJ = 25°C, 5.0 mA ≤ IO ≤ 200 mA | 2 | |
| Input Bias Current (TJ = 25°C) | IIB | 3.2 | 6 | mA | TJ = 25°C | 2 | |
| Quiescent Current Change | IIB | 0.8 | mA | 8.0 Vdc ≤ VI ≤ 25 Vdc, IO = 200 mA | 2 | ||
| Quiescent Current Change | IIB | 0.5 | mA | 5.0 mA ≤ IO ≤ 350 mA | 2 | ||
| Ripple Rejection | RR | 62 | dB | IO = 100 mA, f = 120 Hz, 8.0 V ≤ VI ≤ 18 V | 2 | ||
| Ripple Rejection | RR | 62 | 80 | dB | IO = 300 mA, f = 120 Hz, 8.0 ≤ VI ≤ 18 V, TJ = 25°C | 2 | |
| Average Temperature Coefficient of Output Voltage | VO/T | -0.2 | 0.2 | mV/°C | IO = 5.0 mA | 2 | |
| Input Voltage (5.0 V−18 V) | VI | 35 | Vdc | 5.0 V−18 V output option | 2 | ||
| Operating Junction Temperature Range | TJ | 150 | °C | 2 | |||
| Storage Temperature Range | Tstg | -65 | 150 | °C | 2 | ||
| Thermal Resistance, Junction-to-Air | JA | 92 | °C/W | DT Suffix (DPAK) | 2 | ||
| Thermal Resistance, Junction-to-Case | JC | 5 | °C/W | DT Suffix (DPAK) | 2 |
CAD (KiCad official)
- Symbol:
MC78M05ACDTRKG - Footprint:
Package_TO_SOT_SMD:TO-252-2 - 3D model: DPAK-3 (KiCad packages3D, STEP)
- 3D model files:
mc78m05acdtrkg-etched.step/mc78m05acdtrkg-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mc78m05acdtrkg.step/mc78m05acdtrkg.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: onsemi datasheet (14 pp, sha256
6ff0b93f1bfb0373, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# MC78M05ACDTRKG
**onsemi** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · DPAK-3
MC78M05ACDTRKG from onsemi, in a DPAK-3. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Input | power_in | Unregulated input voltage to the regulator; the absolute maximum input is 35 Vdc for the 5.0 V-18 V option, and a 0.33 µF or larger low-ESR bypass capacitor is recommended directly across the input when the supply filter is remote. |
| 2 | Ground | power_in | Common ground reference for the regulator; the heatsink surface (tab) is connected to this pin. |
| 3 | Output | power_out | Regulated 5.0 V output, rated for up to 500 mA with adequate heatsinking. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | DPAK-3 |
| Category | Power Management (PMIC) |
| Pins | 3 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Output Voltage (TJ = 25°C) | VO | 4.9 | 5 | 5.1 | Vdc | TJ = 25°C | 2 |
| Output Voltage Variation | VO | 4.8 | | 5.2 | Vdc | 7.0 Vdc ≤ VI ≤ 20 Vdc, 5.0 mA ≤ IO ≤ 350 mA | 2 |
| Line Regulation | Regline | | 3 | 50 | mV | TJ = 25°C, 7.0 Vdc ≤ VI ≤ 25 Vdc, IO = 200 mA | 2 |
| Load Regulation | Regload | | 20 | 100 | mV | TJ = 25°C, 5.0 mA ≤ IO ≤ 500 mA | 2 |
| Load Regulation | Regload | | 10 | 50 | mV | TJ = 25°C, 5.0 mA ≤ IO ≤ 200 mA | 2 |
| Input Bias Current (TJ = 25°C) | IIB | | 3.2 | 6 | mA | TJ = 25°C | 2 |
| Quiescent Current Change | IIB | | | 0.8 | mA | 8.0 Vdc ≤ VI ≤ 25 Vdc, IO = 200 mA | 2 |
| Quiescent Current Change | IIB | | | 0.5 | mA | 5.0 mA ≤ IO ≤ 350 mA | 2 |
| Ripple Rejection | RR | 62 | | | dB | IO = 100 mA, f = 120 Hz, 8.0 V ≤ VI ≤ 18 V | 2 |
| Ripple Rejection | RR | 62 | 80 | | dB | IO = 300 mA, f = 120 Hz, 8.0 ≤ VI ≤ 18 V, TJ = 25°C | 2 |
| Average Temperature Coefficient of Output Voltage | VO/T | -0.2 | | 0.2 | mV/°C | IO = 5.0 mA | 2 |
| Input Voltage (5.0 V−18 V) | VI | | | 35 | Vdc | 5.0 V−18 V output option | 2 |
| Operating Junction Temperature Range | TJ | | | 150 | °C | | 2 |
| Storage Temperature Range | Tstg | -65 | | 150 | °C | | 2 |
| Thermal Resistance, Junction-to-Air | JA | | | 92 | °C/W | DT Suffix (DPAK) | 2 |
| Thermal Resistance, Junction-to-Case | JC | | | 5 | °C/W | DT Suffix (DPAK) | 2 |
## CAD (KiCad official)
- Symbol: `MC78M05ACDTRKG`
- Footprint: `Package_TO_SOT_SMD:TO-252-2`
- 3D model: DPAK-3 (KiCad packages3D, STEP)
- 3D model files: `mc78m05acdtrkg-etched.step` / `mc78m05acdtrkg-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `mc78m05acdtrkg.step` / `mc78m05acdtrkg.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [onsemi datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588918652058423296) (14 pp, sha256 `6ff0b93f1bfb0373`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/mc78m05acdtrkg-datasheet.pdf)