component

MC78M05ABDTRKG

Public Made by Adom

by adom

onsemi Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, DPAK-3. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs mc78m05abdtrkg: etch along the lead row, tab up; full MPN text (service-occt 1.9.3) (service-occt 1.6.0, from the plain… · Ray
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
mc78m05abdtrkg-etched.fit.json mc78m05abdtrkg: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
mc78m05abdtrkg-etched.glb mc78m05abdtrkg: etch along the lead row, tab up; full MPN text (service-occt 1.9.3) (service-occt 1.6.0, from the plain… · Ray
mc78m05abdtrkg-etched.step mc78m05abdtrkg: etch along the lead row, tab up; full MPN text (service-occt 1.9.3) (service-occt 1.6.0, from the plain… · Ray
mc78m05abdtrkg.glb Publish 0.1.0 · Ray
mc78m05abdtrkg.kicad_mod Publish 0.1.0 · Ray
mc78m05abdtrkg.kicad_sym Publish 0.1.0 · Ray
mc78m05abdtrkg.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect an… · Ray
mc78m05abdtrkg.step Publish 0.1.0 · Ray
package.json Publish 0.2.0 · Ray
pads.json pinmap.json: symbol pin 4 (Tab/Ground) lands on pad 2. On a DPAK the tab IS the middle lead, so the footprint gives it… · Ray
page.json mc78m05abdtrkg: etch along the lead row, tab up; full MPN text (service-occt 1.9.3) (service-occt 1.6.0, from the plain… · Ray
pinmap.json pinmap.json: symbol pin 4 (Tab/Ground) lands on pad 2. On a DPAK the tab IS the middle lead, so the footprint gives it… · Ray
README.md mc78m05abdtrkg: specified limits as data (metadata.characteristics, 20 rows from the datasheet) · Ray

MC78M05ABDTRKG

onsemi · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · DPAK-3

MC78M05ABDTRKG from onsemi, in a DPAK-3. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 Input power_in Unregulated positive input supply. For the 5.0 V variant, operate with V_I from 7.0 V to 25 V (absolute maximum 35 V). Bypass with a suitable input capacitor when the regulator is located far from the filter capacitor.
2 Ground power_in Common ground reference for both input and output. Also connected internally to the exposed heatsink tab (terminal 4) of the DPAK-3 package, which serves as the primary thermal path to the PCB copper.
3 Output power_out Regulated +5.0 V output (4.9 V to 5.1 V typical for the AB high-accuracy grade at Tj = 25°C). Delivers up to 500 mA with adequate heatsinking; short-circuit current limit is typically 350 mA and peak output current is 700 mA. Dropout voltage is typically 2.0 V.
4 Tab/Ground power_in Exposed heatsink tab on the underside of the DPAK-3 package. Electrically tied internally to pin 2 (Ground). Solder to a copper pour to sink heat; θJC = 5.0 °C/W, θJA = 92 °C/W in the DT suffix package.

Key specifications

Parameter Value
Manufacturer onsemi
Package DPAK-3
Category PMIC
Pins 4

Ordering variants

Same part, different packaging or reel option.

  • MC78M05ABDTRKG
  • MC78M05ABDTRKGDTG
  • MC78M05ABDTRKGTG

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Output Voltage (TJ = 25°C) VO 4.9 5 5.1 Vdc TJ = 25°C 2
Output Voltage Variation VO 4.8 5.2 Vdc 7.0 Vdc ≤ VI ≤ 20 Vdc, 5.0 mA ≤ IO ≤ 350 mA 2
Line Regulation Regline 3 50 mV TJ = 25°C, 7.0 Vdc ≤ VI ≤ 25 Vdc, IO = 200 mA 2
Load Regulation Regload 20 100 mV TJ = 25°C, 5.0 mA ≤ IO ≤ 500 mA 2
Load Regulation Regload 10 50 mV TJ = 25°C, 5.0 mA ≤ IO ≤ 200 mA 2
Input Bias Current IIB 3.2 6 mA TJ = 25°C 2
Quiescent Current Change IIB 0.8 mA 8.0 Vdc ≤ VI ≤ 25 Vdc, IO = 200 mA 2
Quiescent Current Change IIB 0.5 mA 5.0 mA ≤ IO ≤ 350 mA 2
Ripple Rejection RR 62 dB IO = 100 mA, f = 120 Hz, 8.0 V ≤ VI ≤ 18 V 2
Ripple Rejection RR 62 80 dB IO = 300 mA, f = 120 Hz, 8.0 ≤ VI ≤ 18 V, TJ = 25°C 2
Absolute Maximum Input Voltage (5.0 V−18 V option) VI 35 Vdc 5.0 V−18 V option 2
Operating Junction Temperature Range TJ 150 °C 2
Storage Temperature Range Tstg -65 150 °C 2
Output Noise Voltage Vn 40 V TA = 25°C, 10 Hz ≤ f ≤ 100 kHz 2
Dropout Voltage (TJ = 25°C) VI−VO 2 Vdc TJ = 25°C 2
Short Circuit Current Limit IOS 350 mA TJ = 25°C, VI = 35 V 2
Average Temperature Coefficient of Output Voltage VO/T 0.2 mV/°C IO = 5.0 mA 2
Peak Output Current IO 700 mA TJ = 25°C 2
Thermal Resistance, Junction-to-Air (DT Suffix, DPAK-3) θJA 92 °C/W DT Suffix, DPAK-3 2
Thermal Resistance, Junction-to-Case (DT Suffix, DPAK-3) θJC 5 °C/W DT Suffix, DPAK-3 2

CAD (KiCad official)

  • Symbol: MC78M05ABDTRKG
  • Footprint: Package_TO_SOT_SMD:TO-252-2
  • 3D model: DPAK-3 (KiCad packages3D, STEP)
  • 3D model files: mc78m05abdtrkg-etched.step / mc78m05abdtrkg-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mc78m05abdtrkg.step / mc78m05abdtrkg.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
mc78m05abdtrkg.step 119 KB You want the bare part, or you mark your own boards.
mc78m05abdtrkg-etched.step 2.2 MB You want the part with MC78M05ABDTRKG already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 580 faces against 83 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (15 pp, sha256 2339bbc0a38dcd3b, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF