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MC78L12ABDR2G

Public Made by Adom

by adom

onsemi Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOIC-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs mc78l12abdr2g: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
mc78l12abdr2g-etched.fit.json mc78l12abdr2g: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
mc78l12abdr2g-etched.glb mc78l12abdr2g: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
mc78l12abdr2g-etched.step mc78l12abdr2g: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
mc78l12abdr2g.glb Publish 0.1.0 · Ray
mc78l12abdr2g.kicad_mod Publish 0.1.0 · Ray
mc78l12abdr2g.kicad_sym Publish 0.1.0 · Ray
mc78l12abdr2g.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect an… · Ray
mc78l12abdr2g.step Publish 0.1.0 · Ray
package.json Publish 0.2.0 · Ray
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
page.json mc78l12abdr2g: specified limits as data (metadata.characteristics, 21 rows from the datasheet) · Ray
README.md mc78l12abdr2g: specified limits as data (metadata.characteristics, 21 rows from the datasheet) · Ray

MC78L12ABDR2G

onsemi · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOIC-8

MC78L12ABDR2G from onsemi, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VOUT power_out Regulated +12 V output, 100 mA capability (min 11.4 V, typ 12.0 V, max 12.6 V). Recommended 0.1 µF ceramic capacitor to GND for transient response.
2 GND power_in Ground return. On this internally-modified SO-8 package, pins 2, 3, 6, 7 are electrically common to the die-attach flag for improved thermal dissipation.
3 GND power_in Ground return. Electrically common with pins 2, 6, 7 and die-attach flag for thermal enhancement.
4 NC unconnected No internal connection. Leave floating or tie to GND per board layout preference.
5 NC unconnected No internal connection. Leave floating or tie to GND per board layout preference.
6 GND power_in Ground return. Electrically common with pins 2, 3, 7 and die-attach flag for thermal enhancement.
7 GND power_in Ground return. Electrically common with pins 2, 3, 6 and die-attach flag for thermal enhancement.
8 VIN power_in Unregulated positive supply input. Operating range typically 14.5-27 V for the 12 V variant; absolute maximum 35 V. Requires 0.33 µF input capacitor if placed appreciable distance from supply filter.

Key specifications

Parameter Value
Manufacturer onsemi
Package SOIC-8
Category PMIC
Pins 8

Ordering variants

Same part, different packaging or reel option.

  • MC78L12ABDR2G
  • MC78L12ACDR2G
  • MC78L12ABPG
  • MC78L12ACPG

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Output Voltage (TJ = +25°C) VO 11.5 12 12.5 Vdc TJ = +25°C 4
Output Voltage (14.5 Vdc ≤ VI ≤ 27 Vdc, 1.0 mA ≤ IO ≤ 40 mA) VO 11.4 12.6 Vdc 14.5 Vdc ≤ VI ≤ 27 Vdc, 1.0 mA ≤ IO ≤ 40 mA 4
Output Voltage (VI = 19 V, 1.0 mA ≤ IO ≤ 70 mA) VO 11.4 12.6 Vdc VI = 19 V, 1.0 mA ≤ IO ≤ 70 mA 4
Line Regulation (14.5 Vdc ≤ VI ≤ 27 Vdc) Regline 120 250 mV TJ = +25°C, IO = 40 mA, 14.5 Vdc ≤ VI ≤ 27 Vdc 4
Line Regulation (16 Vdc ≤ VI ≤ 27 Vdc) Regline 100 200 mV TJ = +25°C, IO = 40 mA, 16 Vdc ≤ VI ≤ 27 Vdc 4
Load Regulation (1.0 mA ≤ IO ≤ 100 mA) Regload 20 100 mV TJ = +25°C, 1.0 mA ≤ IO ≤ 100 mA 4
Load Regulation (1.0 mA ≤ IO ≤ 40 mA) Regload 10 50 mV TJ = +25°C, 1.0 mA ≤ IO ≤ 40 mA 4
Input Bias Current (TJ = +25°C) IIB 4.2 6.5 mA TJ = +25°C 4
Input Bias Current (TJ = +125°C) IIB 6 mA TJ = +125°C 4
Input Bias Current Change (16 Vdc ≤ VI ≤ 27 Vdc) IIB 1.5 mA 16 Vdc ≤ VI ≤ 27 Vdc 4
Input Bias Current Change (1.0 mA ≤ IO ≤ 40 mA) IIB 0.1 mA 1.0 mA ≤ IO ≤ 40 mA 4
Ripple Rejection RR 37 42 dB IO = 40 mA, f = 120 Hz, 15 V ≤ VI ≤ 25 V, TJ = +25°C 4
Operating Junction Temperature (MC78LXXAB) TJ -40 125 °C MC78LXXAB, −40°C < TJ < +125°C 4
Output Noise Voltage (TA = +25°C, 10 Hz ≤ f ≤ 100 kHz) Vn 80 V TA = +25°C, 10 Hz ≤ f ≤ 100 kHz 4
Dropout Voltage (TJ = +25°C) VI − VO 1.7 Vdc TJ = +25°C 4
Input Voltage (12 V−18 V output devices) VI 35 Vdc Input Voltage (12 V−18 V) row 2
Storage Temperature Range Tstg -65 150 °C 2
Maximum Junction Temperature TJ 150 °C 2
ESD Capability, Human Body Model ESDHBM 2000 V Note 1, AEC-Q100-002 2
ESD Capability, Machine Model ESDMM 200 V Note 1, AEC-Q100-003 2
ESD Capability, Charged Device Model ESDCDM 2000 V Note 1, EIA/JESD22-C101 2

CAD (KiCad official)

  • Symbol: MC78L12ABDR2G
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: mc78l12abdr2g-etched.step / mc78l12abdr2g-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mc78l12abdr2g.step / mc78l12abdr2g.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
mc78l12abdr2g.step 122 KB You want the bare part, or you mark your own boards.
mc78l12abdr2g-etched.step 2.5 MB You want the part with MC78L12ABDR2G already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 625 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (19 pp, sha256 6ff9a93de09c52e0, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF