main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs mc78l05abdr2g: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
mc78l05abdr2g-etched.fit.json mc78l05abdr2g: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
mc78l05abdr2g-etched.glb mc78l05abdr2g: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
mc78l05abdr2g-etched.step mc78l05abdr2g: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
mc78l05abdr2g.glb Publish 0.1.0 · Ray
mc78l05abdr2g.kicad_mod Publish 0.1.0 · Ray
mc78l05abdr2g.kicad_sym Publish 0.1.0 · Ray
mc78l05abdr2g.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect an… · Ray
mc78l05abdr2g.step Publish 0.1.0 · Ray
package.json Publish 0.2.0 · Ray
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
page.json mc78l05abdr2g: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray
README.md mc78l05abdr2g: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray

MC78L05ABDR2G

onsemi · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOIC-8

MC78L05ABDR2G from onsemi, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VOUT power_out Regulated +5.0 V output (4.8 V to 5.2 V at Tj=25 C). Sources up to 100 mA. A 0.1 uF output capacitor is recommended to improve transient response.
2 GND power_in Ground / common reference. Pins 2, 3, 6, and 7 are all electrically common to the internal die attach flag for improved thermal dissipation and must be tied to ground.
3 GND power_in Ground / common reference. Electrically common with pins 2, 6, 7 and the die attach flag; tie to ground plane to lower thermal resistance.
4 NC unconnected No internal connection. Leave floating or tie to GND at the user's discretion.
5 NC unconnected No internal connection. Leave floating or tie to GND at the user's discretion.
6 GND power_in Ground / common reference. Electrically common with pins 2, 3, 7 and the die attach flag; tie to ground plane for thermal dissipation.
7 GND power_in Ground / common reference. Electrically common with pins 2, 3, 6 and the die attach flag; tie to ground plane for thermal dissipation.
8 VIN power_in Unregulated positive input voltage. For the 5 V variant, absolute maximum is 30 V; typical operating range is 7.0 V to 20 V. Must remain ~2 V above VOUT even at the ripple valley. A 0.33 uF input capacitor is required if the regulator is located away from the power supply filter.

Key specifications

Parameter Value
Manufacturer onsemi
Package SOIC-8
Category PMIC
Pins 8

Ordering variants

Same part, different packaging or reel option.

  • MC78L05ABDR2G
  • MC78L05ABDR2GDG
  • MC78L05ABDR2GP
  • MC78L05ABDR2GRP
  • MC78L05ABDR2GRPG
  • MC78L05ABDR2GZP
  • MC78L05ABDR2GZPG
  • MC78L05ABDR2GAPG
  • MC78L05ABDR2GABPG
  • MC78L05ABDR2GACPG

CAD (KiCad official)

  • Symbol: MC78L05ABDR2G
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: mc78l05abdr2g-etched.step / mc78l05abdr2g-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mc78l05abdr2g.step / mc78l05abdr2g.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
mc78l05abdr2g.step 122 KB You want the bare part, or you mark your own boards.
mc78l05abdr2g-etched.step 2.7 MB You want the part with MC78L05ABDR2G already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 657 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (14 pp, sha256 5e07299724d54f75, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF