component
MC74VHCT245ADTG
Public Made by Adomby adom
onsemi Buffers, Drivers, Receivers, Transceivers, TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
MC74VHCT245ADTG
onsemi · Buffers, Drivers, Receivers, Transceivers · TSSOP-20
MC74VHCT245ADTG from onsemi, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | DIR | input | Direction control input that sets the transfer direction when OE is low: LOW selects Bus B to Bus A and HIGH selects Bus A to Bus B. |
| 2 | A1 | bidirectional | Bus A data bit 1; do not force an external signal on this I/O while it is an active output, as damage may occur. |
| 3 | A2 | bidirectional | Bus A data bit 2; do not force an external signal on this I/O while it is an active output, as damage may occur. |
| 4 | A3 | bidirectional | Bus A data bit 3; do not force an external signal on this I/O while it is an active output, as damage may occur. |
| 5 | A4 | bidirectional | Bus A data bit 4; do not force an external signal on this I/O while it is an active output, as damage may occur. |
| 6 | A5 | bidirectional | Bus A data bit 5; do not force an external signal on this I/O while it is an active output, as damage may occur. |
| 7 | A6 | bidirectional | Bus A data bit 6; do not force an external signal on this I/O while it is an active output, as damage may occur. |
| 8 | A7 | bidirectional | Bus A data bit 7; do not force an external signal on this I/O while it is an active output, as damage may occur. |
| 9 | A8 | bidirectional | Bus A data bit 8; do not force an external signal on this I/O while it is an active output, as damage may occur. |
| 10 | GND | power_in | Ground reference pin for the device. |
| 11 | B8 | bidirectional | Bus B data bit 8; unused I/O must be left open and unused inputs tied to GND or VCC. |
| 12 | B7 | bidirectional | Bus B data bit 7; unused I/O must be left open and unused inputs tied to GND or VCC. |
| 13 | B6 | bidirectional | Bus B data bit 6; unused I/O must be left open and unused inputs tied to GND or VCC. |
| 14 | B5 | bidirectional | Bus B data bit 5; unused I/O must be left open and unused inputs tied to GND or VCC. |
| 15 | B4 | bidirectional | Bus B data bit 4; unused I/O must be left open and unused inputs tied to GND or VCC. |
| 16 | B3 | bidirectional | Bus B data bit 3; unused I/O must be left open and unused inputs tied to GND or VCC. |
| 17 | B2 | bidirectional | Bus B data bit 2; unused I/O must be left open and unused inputs tied to GND or VCC. |
| 18 | B1 | bidirectional | Bus B data bit 1; unused I/O must be left open and unused inputs tied to GND or VCC. |
| 19 | OE | input | Active-low output enable: LOW allows data transfer in the direction set by DIR, and HIGH isolates the buses in the high-impedance state. |
| 20 | VCC | power_in | Positive supply pin; the device is designed for a 4.5 V to 5.5 V operating range. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | TSSOP-20 |
| Category | Logic |
| Pins | 20 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input High-Level Voltage (TA = 25°C) | VIH | 2 | V | VCC = 4.5 to 5.5 V; TA = 25°C | 3 | ||
| Input High-Level Voltage (TA = -40 to 85°C) | VIH | 2 | V | VCC = 4.5 to 5.5 V; TA = -40 to 85°C | 3 | ||
| Input Low-Level Voltage (TA = 25°C) | VIL | 0.8 | V | VCC = 4.5 to 5.5 V; TA = 25°C | 3 | ||
| Input Low-Level Voltage (TA = -40 to 85°C) | VIL | 0.8 | V | VCC = 4.5 to 5.5 V; TA = -40 to 85°C | 3 | ||
| High-Level Output Voltage (TA = 25°C) | VOH | 4.4 | 4.5 | V | VCC = 4.5 V; Vin = VIH or VIL; IOH = -50 µA; TA = 25°C | 3 | |
| High-Level Output Voltage (TA = -40 to 85°C) | VOH | 4.4 | V | VCC = 4.5 V; Vin = VIH or VIL; IOH = -50 µA; TA = -40 to 85°C | 3 | ||
| High-Level Output Voltage (TA = 25°C) | VOH | 3.94 | V | VCC = 4.5 V; Vin = VIH or VIL; IOH = -8 mA; TA = 25°C | 3 | ||
| High-Level Output Voltage (TA = -40 to 85°C) | VOH | 3.8 | V | VCC = 4.5 V; Vin = VIH or VIL; IOH = -8 mA; TA = -40 to 85°C | 3 | ||
| Low-Level Output Voltage (TA = 25°C) | VOL | 0 | 0.1 | V | VCC = 4.5 V; Vin = VIH or VIL; IOL = 50 µA; TA = 25°C | 3 | |
| Low-Level Output Voltage (TA = -40 to 85°C) | VOL | 0.1 | V | VCC = 4.5 V; Vin = VIH or VIL; IOL = 50 µA; TA = -40 to 85°C | 3 | ||
| Low-Level Output Voltage (TA = 25°C) | VOL | 0.36 | V | VCC = 4.5 V; Vin = VIH or VIL; IOL = 8 mA; TA = 25°C | 3 | ||
| Low-Level Output Voltage (TA = -40 to 85°C) | VOL | 0.44 | V | VCC = 4.5 V; Vin = VIH or VIL; IOL = 8 mA; TA = -40 to 85°C | 3 | ||
| Maximum Input Leakage Current (TA = 25°C) | Iin | -0.1 | 0.1 | µA | VCC = 0 to 5.5 V; Vin = 5.5 V or GND; TA = 25°C | 3 | |
| Maximum Input Leakage Current (TA = -40 to 85°C) | Iin | -1 | 1 | µA | VCC = 0 to 5.5 V; Vin = 5.5 V or GND; TA = -40 to 85°C | 3 | |
| Maximum 3-State Leakage Current (TA = 25°C) | IOZ | -0.25 | 0.25 | µA | VCC = 5.5 V; Vin = VIL or VIH; Vout = VCC or GND; TA = 25°C | 3 | |
| Maximum 3-State Leakage Current (TA = -40 to 85°C) | IOZ | -2.5 | 2.5 | µA | VCC = 5.5 V; Vin = VIL or VIH; Vout = VCC or GND; TA = -40 to 85°C | 3 | |
| Maximum Quiescent Supply Current (TA = 25°C) | ICC | 4 | µA | VCC = 5.5 V; Vin = VCC or GND; TA = 25°C | 3 | ||
| Maximum Quiescent Supply Current (TA = -40 to 85°C) | ICC | 40 | µA | VCC = 5.5 V; Vin = VCC or GND; TA = -40 to 85°C | 3 | ||
| Quiescent Supply Current (TA = 25°C) | ICCT | 1.35 | mA | VCC = 5.5 V; per input VIN = 3.4 V; other input VCC or GND; TA = 25°C | 3 | ||
| Quiescent Supply Current (TA = -40 to 85°C) | ICCT | 1.5 | mA | VCC = 5.5 V; per input VIN = 3.4 V; other input VCC or GND; TA = -40 to 85°C | 3 | ||
| Output Leakage Current (TA = 25°C) | IOPD | 0.5 | µA | VCC = 0 V; VOUT = 5.5 V; TA = 25°C | 3 | ||
| Output Leakage Current (TA = -40 to 85°C) | IOPD | 5 | µA | VCC = 0 V; VOUT = 5.5 V; TA = -40 to 85°C | 3 | ||
| Maximum Propagation Delay A to B or B to A (CL = 15 pF) | tPLH, tPHL | 4.9 | 7.7 | ns | VCC = 5.0 ± 0.5 V; CL = 15 pF; TA = 25°C; input tr = tf = 3.0 ns | 3 | |
| Maximum Propagation Delay A to B or B to A (CL = 15 pF) | tPLH, tPHL | 1 | 8.5 | ns | VCC = 5.0 ± 0.5 V; CL = 15 pF; TA = -40 to 85°C; input tr = tf = 3.0 ns | 3 | |
| Maximum Propagation Delay A to B or B to A (CL = 50 pF) | tPLH, tPHL | 5.4 | 8.7 | ns | VCC = 5.0 ± 0.5 V; CL = 50 pF; TA = 25°C; input tr = tf = 3.0 ns | 3 | |
| Maximum Propagation Delay A to B or B to A (CL = 50 pF) | tPLH, tPHL | 1 | 9.5 | ns | VCC = 5.0 ± 0.5 V; CL = 50 pF; TA = -40 to 85°C; input tr = tf = 3.0 ns | 3 | |
| Output Enable Time OE to A or B (CL = 15 pF) | tPZL, tPZH | 9.4 | 13.8 | ns | VCC = 5.0 ± 0.5 V; CL = 15 pF; RL = 1k; TA = 25°C; input tr = tf = 3.0 ns | 3 | |
| Output Enable Time OE to A or B (CL = 15 pF) | tPZL, tPZH | 1 | 15 | ns | VCC = 5.0 ± 0.5 V; CL = 15 pF; RL = 1k; TA = -40 to 85°C; input tr = tf = 3.0 ns | 3 | |
| Output Enable Time OE to A or B (CL = 50 pF) | tPZL, tPZH | 9.9 | 14.8 | ns | VCC = 5.0 ± 0.5 V; CL = 50 pF; RL = 1k; TA = 25°C; input tr = tf = 3.0 ns | 3 | |
| Output Enable Time OE to A or B (CL = 50 pF) | tPZL, tPZH | 1 | 16 | ns | VCC = 5.0 ± 0.5 V; CL = 50 pF; RL = 1k; TA = -40 to 85°C; input tr = tf = 3.0 ns | 3 | |
| Output Disable Time OE to A or B (CL = 50 pF) | tPLZ, tPHZ | 10.1 | 15.4 | ns | VCC = 5.0 ± 0.5 V; CL = 50 pF; RL = 1k; TA = 25°C; input tr = tf = 3.0 ns | 3 | |
| Output Disable Time OE to A or B (CL = 50 pF) | tPLZ, tPHZ | 1 | 16.5 | ns | VCC = 5.0 ± 0.5 V; CL = 50 pF; RL = 1k; TA = -40 to 85°C; input tr = tf = 3.0 ns | 3 | |
| Output to Output Skew (CL = 50 pF) | tOSLH, tOSHL | 1 | ns | VCC = 5.0 ± 0.5 V; CL = 50 pF; TA = 25°C; parameter guaranteed by design (Note 1) | 3 | ||
| Maximum Input Capacitance (TA = 25°C) | Cin | 4 | 10 | pF | 3 | ||
| Maximum Input Capacitance (TA = -40 to 85°C) | Cin | 10 | pF | TA = -40 to 85°C | 3 | ||
| Maximum 3-State Output Capacitance (Output in High-Impedance State) (TA = 25°C) | Cout | 13 | pF | Output in high-impedance state; TA = 25°C | 3 | ||
| Quiet Output Maximum Dynamic VOL | VOLP | 1.2 | 1.6 | V | Input tr = tf = 3.0 ns; CL = 50 pF; VCC = 5.0 V; TA = 25°C | 3 | |
| Quiet Output Minimum Dynamic VOL | VOLV | -1.2 | -1.6 | V | Input tr = tf = 3.0 ns; CL = 50 pF; VCC = 5.0 V; TA = 25°C | 3 | |
| Minimum High-Level Dynamic Input Voltage | VIHD | 2 | V | Input tr = tf = 3.0 ns; CL = 50 pF; VCC = 5.0 V; TA = 25°C | 3 | ||
| Maximum Low-Level Dynamic Input Voltage | VILD | 0.8 | V | Input tr = tf = 3.0 ns; CL = 50 pF; VCC = 5.0 V; TA = 25°C | 3 | ||
| DC Supply Voltage | VCC | -0.5 | 7 | V | 2 | ||
| DC Input Voltage | Vin | -0.5 | 7 | V | 2 | ||
| DC Output Voltage | VI/O | -0.5 | 7 | V | Outputs in 3-State | 2 | |
| DC Output Voltage | VI/O | -0.5 | V | High or Low State; upper limit printed as VCC + 0.5 V | 2 | ||
| Input Diode Current | IIK | -20 | mA | 2 | |||
| Output Diode Current | IOK | -20 | 20 | mA | VOUT < GND; VOUT > VCC | 2 | |
| DC Output Current, per Pin | Iout | -25 | 25 | mA | 2 | ||
| DC Supply Current, VCC and GND Pins | ICC | -75 | 75 | mA | 2 | ||
| Power Dissipation in Still Air, TSSOP Package | PD | 450 | mW | Still air; TSSOP package | 2 | ||
| Storage Temperature | Tstg | -65 | 150 | °C | 2 | ||
| DC Supply Voltage | VCC | 4.5 | 5.5 | V | 2 | ||
| DC Input Voltage | Vin | 0 | 5.5 | V | 2 | ||
| DC Output Voltage | VI/O | 0 | 5.5 | V | Outputs in 3-State | 2 | |
| DC Output Voltage | VI/O | 0 | V | High or Low State; upper limit printed as VCC | 2 | ||
| Operating Temperature | TA | -40 | 85 | °C | 2 | ||
| Input Rise and Fall Time | tr, tf | 0 | 20 | ns/V | VCC = 5.0 V ± 0.5 V | 2 |
CAD (KiCad official)
- Symbol:
MC74VHCT245ADTG - Footprint:
Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm - 3D model: TSSOP-20 (KiCad packages3D, STEP)
- 3D model files:
mc74vhct245adtg-etched.step/mc74vhct245adtg-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mc74vhct245adtg.step/mc74vhct245adtg.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: onsemi datasheet (8 pp, sha256
3eb7e3f4b2442130, retrieved 2026-10-20, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# MC74VHCT245ADTG
**onsemi** · Buffers, Drivers, Receivers, Transceivers · TSSOP-20
MC74VHCT245ADTG from onsemi, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | DIR | input | Direction control input that sets the transfer direction when OE is low: LOW selects Bus B to Bus A and HIGH selects Bus A to Bus B. |
| 2 | A1 | bidirectional | Bus A data bit 1; do not force an external signal on this I/O while it is an active output, as damage may occur. |
| 3 | A2 | bidirectional | Bus A data bit 2; do not force an external signal on this I/O while it is an active output, as damage may occur. |
| 4 | A3 | bidirectional | Bus A data bit 3; do not force an external signal on this I/O while it is an active output, as damage may occur. |
| 5 | A4 | bidirectional | Bus A data bit 4; do not force an external signal on this I/O while it is an active output, as damage may occur. |
| 6 | A5 | bidirectional | Bus A data bit 5; do not force an external signal on this I/O while it is an active output, as damage may occur. |
| 7 | A6 | bidirectional | Bus A data bit 6; do not force an external signal on this I/O while it is an active output, as damage may occur. |
| 8 | A7 | bidirectional | Bus A data bit 7; do not force an external signal on this I/O while it is an active output, as damage may occur. |
| 9 | A8 | bidirectional | Bus A data bit 8; do not force an external signal on this I/O while it is an active output, as damage may occur. |
| 10 | GND | power_in | Ground reference pin for the device. |
| 11 | B8 | bidirectional | Bus B data bit 8; unused I/O must be left open and unused inputs tied to GND or VCC. |
| 12 | B7 | bidirectional | Bus B data bit 7; unused I/O must be left open and unused inputs tied to GND or VCC. |
| 13 | B6 | bidirectional | Bus B data bit 6; unused I/O must be left open and unused inputs tied to GND or VCC. |
| 14 | B5 | bidirectional | Bus B data bit 5; unused I/O must be left open and unused inputs tied to GND or VCC. |
| 15 | B4 | bidirectional | Bus B data bit 4; unused I/O must be left open and unused inputs tied to GND or VCC. |
| 16 | B3 | bidirectional | Bus B data bit 3; unused I/O must be left open and unused inputs tied to GND or VCC. |
| 17 | B2 | bidirectional | Bus B data bit 2; unused I/O must be left open and unused inputs tied to GND or VCC. |
| 18 | B1 | bidirectional | Bus B data bit 1; unused I/O must be left open and unused inputs tied to GND or VCC. |
| 19 | OE | input | Active-low output enable: LOW allows data transfer in the direction set by DIR, and HIGH isolates the buses in the high-impedance state. |
| 20 | VCC | power_in | Positive supply pin; the device is designed for a 4.5 V to 5.5 V operating range. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | TSSOP-20 |
| Category | Logic |
| Pins | 20 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input High-Level Voltage (TA = 25°C) | VIH | 2 | | | V | VCC = 4.5 to 5.5 V; TA = 25°C | 3 |
| Input High-Level Voltage (TA = -40 to 85°C) | VIH | 2 | | | V | VCC = 4.5 to 5.5 V; TA = -40 to 85°C | 3 |
| Input Low-Level Voltage (TA = 25°C) | VIL | | | 0.8 | V | VCC = 4.5 to 5.5 V; TA = 25°C | 3 |
| Input Low-Level Voltage (TA = -40 to 85°C) | VIL | | | 0.8 | V | VCC = 4.5 to 5.5 V; TA = -40 to 85°C | 3 |
| High-Level Output Voltage (TA = 25°C) | VOH | 4.4 | 4.5 | | V | VCC = 4.5 V; Vin = VIH or VIL; IOH = -50 µA; TA = 25°C | 3 |
| High-Level Output Voltage (TA = -40 to 85°C) | VOH | 4.4 | | | V | VCC = 4.5 V; Vin = VIH or VIL; IOH = -50 µA; TA = -40 to 85°C | 3 |
| High-Level Output Voltage (TA = 25°C) | VOH | 3.94 | | | V | VCC = 4.5 V; Vin = VIH or VIL; IOH = -8 mA; TA = 25°C | 3 |
| High-Level Output Voltage (TA = -40 to 85°C) | VOH | 3.8 | | | V | VCC = 4.5 V; Vin = VIH or VIL; IOH = -8 mA; TA = -40 to 85°C | 3 |
| Low-Level Output Voltage (TA = 25°C) | VOL | | 0 | 0.1 | V | VCC = 4.5 V; Vin = VIH or VIL; IOL = 50 µA; TA = 25°C | 3 |
| Low-Level Output Voltage (TA = -40 to 85°C) | VOL | | | 0.1 | V | VCC = 4.5 V; Vin = VIH or VIL; IOL = 50 µA; TA = -40 to 85°C | 3 |
| Low-Level Output Voltage (TA = 25°C) | VOL | | | 0.36 | V | VCC = 4.5 V; Vin = VIH or VIL; IOL = 8 mA; TA = 25°C | 3 |
| Low-Level Output Voltage (TA = -40 to 85°C) | VOL | | | 0.44 | V | VCC = 4.5 V; Vin = VIH or VIL; IOL = 8 mA; TA = -40 to 85°C | 3 |
| Maximum Input Leakage Current (TA = 25°C) | Iin | -0.1 | | 0.1 | µA | VCC = 0 to 5.5 V; Vin = 5.5 V or GND; TA = 25°C | 3 |
| Maximum Input Leakage Current (TA = -40 to 85°C) | Iin | -1 | | 1 | µA | VCC = 0 to 5.5 V; Vin = 5.5 V or GND; TA = -40 to 85°C | 3 |
| Maximum 3-State Leakage Current (TA = 25°C) | IOZ | -0.25 | | 0.25 | µA | VCC = 5.5 V; Vin = VIL or VIH; Vout = VCC or GND; TA = 25°C | 3 |
| Maximum 3-State Leakage Current (TA = -40 to 85°C) | IOZ | -2.5 | | 2.5 | µA | VCC = 5.5 V; Vin = VIL or VIH; Vout = VCC or GND; TA = -40 to 85°C | 3 |
| Maximum Quiescent Supply Current (TA = 25°C) | ICC | | | 4 | µA | VCC = 5.5 V; Vin = VCC or GND; TA = 25°C | 3 |
| Maximum Quiescent Supply Current (TA = -40 to 85°C) | ICC | | | 40 | µA | VCC = 5.5 V; Vin = VCC or GND; TA = -40 to 85°C | 3 |
| Quiescent Supply Current (TA = 25°C) | ICCT | | | 1.35 | mA | VCC = 5.5 V; per input VIN = 3.4 V; other input VCC or GND; TA = 25°C | 3 |
| Quiescent Supply Current (TA = -40 to 85°C) | ICCT | | | 1.5 | mA | VCC = 5.5 V; per input VIN = 3.4 V; other input VCC or GND; TA = -40 to 85°C | 3 |
| Output Leakage Current (TA = 25°C) | IOPD | | | 0.5 | µA | VCC = 0 V; VOUT = 5.5 V; TA = 25°C | 3 |
| Output Leakage Current (TA = -40 to 85°C) | IOPD | | | 5 | µA | VCC = 0 V; VOUT = 5.5 V; TA = -40 to 85°C | 3 |
| Maximum Propagation Delay A to B or B to A (CL = 15 pF) | tPLH, tPHL | | 4.9 | 7.7 | ns | VCC = 5.0 ± 0.5 V; CL = 15 pF; TA = 25°C; input tr = tf = 3.0 ns | 3 |
| Maximum Propagation Delay A to B or B to A (CL = 15 pF) | tPLH, tPHL | 1 | | 8.5 | ns | VCC = 5.0 ± 0.5 V; CL = 15 pF; TA = -40 to 85°C; input tr = tf = 3.0 ns | 3 |
| Maximum Propagation Delay A to B or B to A (CL = 50 pF) | tPLH, tPHL | | 5.4 | 8.7 | ns | VCC = 5.0 ± 0.5 V; CL = 50 pF; TA = 25°C; input tr = tf = 3.0 ns | 3 |
| Maximum Propagation Delay A to B or B to A (CL = 50 pF) | tPLH, tPHL | 1 | | 9.5 | ns | VCC = 5.0 ± 0.5 V; CL = 50 pF; TA = -40 to 85°C; input tr = tf = 3.0 ns | 3 |
| Output Enable Time OE to A or B (CL = 15 pF) | tPZL, tPZH | | 9.4 | 13.8 | ns | VCC = 5.0 ± 0.5 V; CL = 15 pF; RL = 1k; TA = 25°C; input tr = tf = 3.0 ns | 3 |
| Output Enable Time OE to A or B (CL = 15 pF) | tPZL, tPZH | 1 | | 15 | ns | VCC = 5.0 ± 0.5 V; CL = 15 pF; RL = 1k; TA = -40 to 85°C; input tr = tf = 3.0 ns | 3 |
| Output Enable Time OE to A or B (CL = 50 pF) | tPZL, tPZH | | 9.9 | 14.8 | ns | VCC = 5.0 ± 0.5 V; CL = 50 pF; RL = 1k; TA = 25°C; input tr = tf = 3.0 ns | 3 |
| Output Enable Time OE to A or B (CL = 50 pF) | tPZL, tPZH | 1 | | 16 | ns | VCC = 5.0 ± 0.5 V; CL = 50 pF; RL = 1k; TA = -40 to 85°C; input tr = tf = 3.0 ns | 3 |
| Output Disable Time OE to A or B (CL = 50 pF) | tPLZ, tPHZ | | 10.1 | 15.4 | ns | VCC = 5.0 ± 0.5 V; CL = 50 pF; RL = 1k; TA = 25°C; input tr = tf = 3.0 ns | 3 |
| Output Disable Time OE to A or B (CL = 50 pF) | tPLZ, tPHZ | 1 | | 16.5 | ns | VCC = 5.0 ± 0.5 V; CL = 50 pF; RL = 1k; TA = -40 to 85°C; input tr = tf = 3.0 ns | 3 |
| Output to Output Skew (CL = 50 pF) | tOSLH, tOSHL | | | 1 | ns | VCC = 5.0 ± 0.5 V; CL = 50 pF; TA = 25°C; parameter guaranteed by design (Note 1) | 3 |
| Maximum Input Capacitance (TA = 25°C) | Cin | | 4 | 10 | pF | | 3 |
| Maximum Input Capacitance (TA = -40 to 85°C) | Cin | | | 10 | pF | TA = -40 to 85°C | 3 |
| Maximum 3-State Output Capacitance (Output in High-Impedance State) (TA = 25°C) | Cout | | | 13 | pF | Output in high-impedance state; TA = 25°C | 3 |
| Quiet Output Maximum Dynamic VOL | VOLP | | 1.2 | 1.6 | V | Input tr = tf = 3.0 ns; CL = 50 pF; VCC = 5.0 V; TA = 25°C | 3 |
| Quiet Output Minimum Dynamic VOL | VOLV | | -1.2 | -1.6 | V | Input tr = tf = 3.0 ns; CL = 50 pF; VCC = 5.0 V; TA = 25°C | 3 |
| Minimum High-Level Dynamic Input Voltage | VIHD | 2 | | | V | Input tr = tf = 3.0 ns; CL = 50 pF; VCC = 5.0 V; TA = 25°C | 3 |
| Maximum Low-Level Dynamic Input Voltage | VILD | | | 0.8 | V | Input tr = tf = 3.0 ns; CL = 50 pF; VCC = 5.0 V; TA = 25°C | 3 |
| DC Supply Voltage | VCC | -0.5 | | 7 | V | | 2 |
| DC Input Voltage | Vin | -0.5 | | 7 | V | | 2 |
| DC Output Voltage | VI/O | -0.5 | | 7 | V | Outputs in 3-State | 2 |
| DC Output Voltage | VI/O | -0.5 | | | V | High or Low State; upper limit printed as VCC + 0.5 V | 2 |
| Input Diode Current | IIK | -20 | | | mA | | 2 |
| Output Diode Current | IOK | -20 | | 20 | mA | VOUT < GND; VOUT > VCC | 2 |
| DC Output Current, per Pin | Iout | -25 | | 25 | mA | | 2 |
| DC Supply Current, VCC and GND Pins | ICC | -75 | | 75 | mA | | 2 |
| Power Dissipation in Still Air, TSSOP Package | PD | | | 450 | mW | Still air; TSSOP package | 2 |
| Storage Temperature | Tstg | -65 | | 150 | °C | | 2 |
| DC Supply Voltage | VCC | 4.5 | | 5.5 | V | | 2 |
| DC Input Voltage | Vin | 0 | | 5.5 | V | | 2 |
| DC Output Voltage | VI/O | 0 | | 5.5 | V | Outputs in 3-State | 2 |
| DC Output Voltage | VI/O | 0 | | | V | High or Low State; upper limit printed as VCC | 2 |
| Operating Temperature | TA | -40 | | 85 | °C | | 2 |
| Input Rise and Fall Time | tr, tf | 0 | | 20 | ns/V | VCC = 5.0 V ± 0.5 V | 2 |
## CAD (KiCad official)
- Symbol: `MC74VHCT245ADTG`
- Footprint: `Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm`
- 3D model: TSSOP-20 (KiCad packages3D, STEP)
- 3D model files: `mc74vhct245adtg-etched.step` / `mc74vhct245adtg-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `mc74vhct245adtg.step` / `mc74vhct245adtg.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [onsemi datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588928611864743936) (8 pp, sha256 `3eb7e3f4b2442130`, retrieved 2026-10-20, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/mc74vhct245adtg-datasheet.pdf)