component
MC74VHCT126ADR2G
Public Made by Adomby adom
onsemi Logic ICs, SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownMC74VHCT126ADR2G
onsemi · Logic ICs · SOIC-14
MC74VHCT126ADR2G from onsemi, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OE1 | input | Active-high output enable for buffer 1; when driven Low, output Y1 is placed in high impedance. |
| 2 | A1 | input | Data input of buffer 1, TTL-compatible (VIL max 0.8 V, VIH min 2.0 V at 4.5 to 5.5 V) and tolerant of voltages up to 7.0 V. |
| 3 | Y1 | tri_state | Three-state output of buffer 1, high impedance when OE1 is Low. |
| 4 | OE2 | input | Active-high output enable for buffer 2; when driven Low, output Y2 is placed in high impedance. |
| 5 | A2 | input | Data input of buffer 2, TTL-compatible (VIL max 0.8 V, VIH min 2.0 V at 4.5 to 5.5 V) and tolerant of voltages up to 7.0 V. |
| 6 | Y2 | tri_state | Three-state output of buffer 2, high impedance when OE2 is Low. |
| 7 | GND | power_in | Ground reference pin for the device. |
| 8 | Y3 | tri_state | Three-state output of buffer 3, high impedance when OE3 is Low. |
| 9 | A3 | input | Data input of buffer 3, TTL-compatible (VIL max 0.8 V, VIH min 2.0 V at 4.5 to 5.5 V) and tolerant of voltages up to 7.0 V. |
| 10 | OE3 | input | Active-high output enable for buffer 3; when driven Low, output Y3 is placed in high impedance. |
| 11 | Y4 | tri_state | Three-state output of buffer 4, high impedance when OE4 is Low. |
| 12 | A4 | input | Data input of buffer 4, TTL-compatible (VIL max 0.8 V, VIH min 2.0 V at 4.5 to 5.5 V) and tolerant of voltages up to 7.0 V. |
| 13 | OE4 | input | Active-high output enable for buffer 4; when driven Low, output Y4 is placed in high impedance. |
| 14 | VCC | power_in | Positive supply; recommended DC supply 4.5 V to 5.5 V within the 2.0 V to 5.5 V operating range. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | SOIC-14 |
| Category | Logic ICs |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| DC Supply Voltage | VCC | 4.5 | 5.5 | V | 2 | ||
| DC Input Voltage | Vin | 0 | 5.5 | V | 2 | ||
| DC Output Voltage, output in 3-State | Vout | 0 | 5.5 | V | Output in 3-State | 2 | |
| DC Output Voltage, output high or low state | Vout | 0 | V | Output in High or Low State; max = VCC | 2 | ||
| Operating Temperature | TA | -40 | 85 | °C | 2 | ||
| Input Rise and Fall Time | tr, tf | 0 | 20 | ns/V | VCC = 5.0 V ±0.5 V | 2 | |
| DC Supply Voltage | VCC | -0.5 | 7 | V | 2 | ||
| DC Input Voltage | Vin | -0.5 | 7 | V | 2 | ||
| DC Output Voltage, output in 3-State | Vout | -0.5 | 7 | V | Output in 3-State | 2 | |
| DC Output Voltage, output high or low state | Vout | -0.5 | V | Output in High or Low State; max = VCC + 0.5 | 2 | ||
| Input Diode Current | IIK | -20 | mA | 2 | |||
| Output Diode Current | IOK | -20 | 20 | mA | VOUT < GND; VOUT > VCC | 2 | |
| DC Output Current, per pin | Iout | -25 | 25 | mA | 2 | ||
| DC Supply Current, VCC and GND Pins | ICC | -75 | 75 | mA | 2 | ||
| Power Dissipation in Still Air, SOIC Packages | PD | 500 | mW | SOIC package, still air | 2 | ||
| Storage Temperature | Tstg | -65 | 150 | °C | 2 | ||
| Minimum High-Level Input Voltage | VIH | 1.2 | V | VCC = 3.0 V; TA = 25°C | 3 | ||
| Minimum High-Level Input Voltage | VIH | 2 | V | VCC = 4.5 V; TA = 25°C | 3 | ||
| Maximum Low-Level Input Voltage | VIL | 0.53 | V | VCC = 3.0 V; TA = 25°C | 3 | ||
| Maximum Low-Level Input Voltage | VIL | 0.8 | V | VCC = 4.5 V; TA = 25°C | 3 | ||
| Minimum High-Level Output Voltage | VOH | 2.9 | V | VIN = VIH or VIL; IOH = −50 µA; VCC = 3.0 V; TA = 25°C | 3 | ||
| Minimum High-Level Output Voltage | VOH | 4.4 | V | VIN = VIH or VIL; IOH = −50 µA; VCC = 4.5 V; TA = 25°C | 3 | ||
| Minimum High-Level Output Voltage | VOH | 2.58 | V | VIN = VIH or VIL; IOH = −4.0 mA; VCC = 3.0 V; TA = 25°C | 3 | ||
| Minimum High-Level Output Voltage | VOH | 2.34 | V | VIN = VIH or VIL; IOH = −4.0 mA; VCC = 3.0 V; TA = 125°C | 3 | ||
| Minimum High-Level Output Voltage | VOH | 3.94 | V | VIN = VIH or VIL; IOH = −8.0 mA; VCC = 4.5 V; TA = 25°C | 3 | ||
| Minimum High-Level Output Voltage | VOH | 3.66 | V | VIN = VIH or VIL; IOH = −8.0 mA; VCC = 4.5 V; TA = 125°C | 3 | ||
| Maximum Low-Level Output Voltage | VOL | 0.1 | V | VIN = VIH or VIL; IOL = 50 µA; VCC = 3.0 V; TA = 25°C | 3 | ||
| Maximum Low-Level Output Voltage | VOL | 0.36 | V | VIN = VIH or VIL; IOL = 4.0 mA; VCC = 3.0 V; TA = 25°C | 3 | ||
| Maximum Low-Level Output Voltage | VOL | 0.52 | V | VIN = VIH or VIL; IOL = 4.0 mA; VCC = 3.0 V; TA = 125°C | 3 | ||
| Maximum Input Leakage Current | IIN | -0.1 | 0.1 | µA | VIN = 5.5 V or GND; VCC = 0 to 5.5 V; TA = 25°C | 3 | |
| Maximum Input Leakage Current | IIN | -1 | 1 | µA | VIN = 5.5 V or GND; VCC = 0 to 5.5 V; TA = 125°C | 3 | |
| Maximum Quiescent Supply Current | ICC | 2 | µA | VIN = VCC or GND; VCC = 5.5 V; TA = 25°C | 3 | ||
| Maximum Quiescent Supply Current | ICC | 40 | µA | VIN = VCC or GND; VCC = 5.5 V; TA = 125°C | 3 | ||
| Quiescent Supply Current | ICCT | 1.35 | mA | Input VIN = 3.4 V; VCC = 5.5 V; TA = 25°C | 3 | ||
| Quiescent Supply Current | ICCT | 1.65 | mA | Input VIN = 3.4 V; VCC = 5.5 V; TA = 125°C | 3 | ||
| Maximum 3-State Leakage Current | IOZ | -2.5 | 2.5 | µA | VIN = VIH or VIL; VOUT = VCC or GND; VCC = 5.5 V; TA = 125°C | 3 | |
| Output Leakage Current | IOPD | 0.5 | µA | VOUT = 5.5 V; VCC = 0.0 V; TA = 25°C | 3 | ||
| Output Leakage Current | IOPD | 10 | µA | VOUT = 5.5 V; VCC = 0.0 V; TA = 125°C | 3 | ||
| Maximum Propagation Delay, A to Y | tPLH, tPHL | 5.5 | 7.5 | ns | VCC = 5.0 ± 0.5 V; CL = 50 pF; TA = 25°C | 3 | |
| Maximum Propagation Delay, A to Y | tPLH, tPHL | 10.5 | ns | VCC = 5.0 ± 0.5 V; CL = 50 pF; TA ≤ 125°C | 3 | ||
| Quiet Output Maximum Dynamic VOL | VOLP | 0.3 | 0.8 | V | Input tr = tf = 3.0 ns; CL = 50 pF; VCC = 5.0 V; TA = 25°C | 4 | |
| Quiet Output Minimum Dynamic VOL | VOLV | -0.3 | -0.8 | V | Input tr = tf = 3.0 ns; CL = 50 pF; VCC = 5.0 V; TA = 25°C | 4 | |
| Minimum High Level Dynamic Input Voltage | VIHD | 3.5 | V | Input tr = tf = 3.0 ns; CL = 50 pF; VCC = 5.0 V; TA = 25°C | 4 | ||
| Maximum Low Level Dynamic Input Voltage | VILD | 1.5 | V | Input tr = tf = 3.0 ns; CL = 50 pF; VCC = 5.0 V; TA = 25°C | 4 |
CAD (KiCad official)
- Symbol:
MC74VHCT126ADR2G - Footprint:
Package_SO:SOIC-14_3.9x8.7mm_P1.27mm - 3D model: SOIC-14 (KiCad packages3D, STEP)
- 3D model files:
mc74vhct126adr2g-etched.step/mc74vhct126adr2g-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mc74vhct126adr2g.step/mc74vhct126adr2g.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: onsemi datasheet (8 pp, sha256
05111954ed25f5a7, retrieved 2026-10-18, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).