component
MC74VHCT125ADTRG
Public Made by Adomby adom
onsemi Buffer/Driver/Transceiver, TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownMC74VHCT125ADTRG
onsemi · Buffer/Driver/Transceiver · TSSOP-14
MC74VHCT125ADTRG from onsemi, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OE1 | input | Active-low 3-state output enable for buffer 1; High places Y1 in high impedance. |
| 2 | A1 | input | Buffer 1 data input, TTL-compatible (VIL 0.8 V, VIH 2.0 V), tolerates 0 to 5.5 V recommended. |
| 3 | Y1 | output | Buffer 1 3-state output with full CMOS swing, 25 mA max DC output current per pin. |
| 4 | OE2 | input | Active-low 3-state output enable for buffer 2; High places Y2 in high impedance. |
| 5 | A2 | input | Buffer 2 data input, TTL-compatible (VIL 0.8 V, VIH 2.0 V), tolerates 0 to 5.5 V recommended. |
| 6 | Y2 | output | Buffer 2 3-state output with full CMOS swing, 25 mA max DC output current per pin. |
| 7 | GND | power_in | Ground (0 V) reference. |
| 8 | Y3 | output | Buffer 3 3-state output with full CMOS swing, 25 mA max DC output current per pin. |
| 9 | A3 | input | Buffer 3 data input, TTL-compatible (VIL 0.8 V, VIH 2.0 V), tolerates 0 to 5.5 V recommended. |
| 10 | OE3 | input | Active-low 3-state output enable for buffer 3; High places Y3 in high impedance. |
| 11 | Y4 | output | Buffer 4 3-state output with full CMOS swing, 25 mA max DC output current per pin. |
| 12 | A4 | input | Buffer 4 data input, TTL-compatible (VIL 0.8 V, VIH 2.0 V), tolerates 0 to 5.5 V recommended. |
| 13 | OE4 | input | Active-low 3-state output enable for buffer 4; High places Y4 in high impedance. |
| 14 | VCC | power_in | Positive supply, 2.0 V to 5.5 V recommended operating range (absolute max 7.0 V). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | TSSOP-14 |
| Category | Logic ICs |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| DC Supply Voltage | VCC | -0.5 | 7 | V | 3 | ||
| DC Input Voltage | Vin | -0.5 | 7 | V | 3 | ||
| DC Output Voltage, 3-State | Vout | -0.5 | 7 | V | Output in 3-State | 3 | |
| DC Output Voltage, High or Low State | Vout | -0.5 | 5.5 | V | High or Low State, max printed as VCC + 0.5 | 3 | |
| Input Diode Current | IIK | -20 | mA | 3 | |||
| Output Diode Current | IOK | 20 | mA | VOUT < GND; VOUT > VCC | 3 | ||
| DC Output Current, per Pin | Iout | 25 | mA | 3 | |||
| DC Supply Current, VCC and GND Pins | ICC | 75 | mA | 3 | |||
| Power Dissipation in Still Air, TSSOP | PD | 450 | mW | TSSOP Package; derating -6.1 mW/°C from 65° to 125°C | 3 | ||
| Storage Temperature | Tstg | -65 | 150 | °C | 3 | ||
| DC Supply Voltage | VCC | 2 | 5.5 | V | 3 | ||
| DC Input Voltage | Vin | 0 | 5.5 | V | 3 | ||
| DC Output Voltage, 3-State | Vout | 0 | 5.5 | V | Output in 3-State | 3 | |
| DC Output Voltage, High or Low State | Vout | 0 | 5.5 | V | High or Low State, max printed as VCC | 3 | |
| Operating Temperature | TA | -55 | 125 | °C | 3 | ||
| Input Rise and Fall Time | tr, tf | 0 | 20 | ns/V | VCC = 5.0 V ± 0.5 V | 3 | |
| Minimum High-Level Input Voltage | VIH | 2 | V | VCC = 4.5 V, TA = 25°C | 3 | ||
| Maximum Low-Level Input Voltage | VIL | 0.8 | V | VCC = 4.5 V to 5.5 V, TA = 25°C | 3 | ||
| Minimum High-Level Output Voltage | VOH | 4.4 | 4.5 | V | VIN = VIH or VIL, IOH = -50 µA, VCC = 4.5 V, TA = 25°C | 3 | |
| Minimum High-Level Output Voltage | VOH | 3.94 | V | VIN = VIH or VIL, IOH = -8.0 mA, VCC = 4.5 V, TA = 25°C | 3 | ||
| Maximum Low-Level Output Voltage | VOL | 0 | 0.1 | V | VIN = VIH or VIL, IOL = 50 µA, VCC = 4.5 V, TA = 25°C | 3 | |
| Maximum Low-Level Output Voltage | VOL | 0.36 | V | VIN = VIH or VIL, IOL = 8.0 mA, VCC = 4.5 V, TA = 25°C | 3 | ||
| Maximum Input Leakage Current | IIN | 0.1 | µA | VIN = 5.5 V or GND, VCC = 0 to 5.5 V, TA = 25°C | 3 | ||
| Maximum Quiescent Supply Current | ICC | 2 | µA | VIN = VCC or GND, VCC = 5.5 V, TA = 25°C | 3 | ||
| Maximum Quiescent Supply Current | ICC | 20 | µA | VIN = VCC or GND, VCC = 5.5 V, TA ≤ 85°C | 3 | ||
| Maximum Quiescent Supply Current | ICC | 40 | µA | VIN = VCC or GND, VCC = 5.5 V, TA ≤ 125°C | 3 | ||
| Quiescent Supply Current (extra, TTL input) | ICCT | 1.35 | mA | Input: VIN = 3.4 V, VCC = 5.5 V, TA = 25°C | 3 | ||
| Maximum Three-State Leakage Current | IOZ | 0.25 | µA | VIN = VIH or VIL, VOUT = VCC or GND, VCC = 5.5 V, TA = 25°C | 3 | ||
| Maximum Three-State Leakage Current | IOZ | 2.5 | µA | VIN = VIH or VIL, VOUT = VCC or GND, VCC = 5.5 V, TA ≤ 85°C | 3 | ||
| Output Leakage Current | IOPD | 0.5 | µA | VOUT = 5.5 V, VCC = 0.0 V, TA = 25°C | 3 | ||
| Propagation Delay A to Y | tPLH, tPHL | 3.8 | 5.5 | ns | VCC = 5.0 ± 0.5 V, CL = 15 pF, TA = 25°C | 4 | |
| Propagation Delay A to Y | tPLH, tPHL | 5.3 | 7.5 | ns | VCC = 5.0 ± 0.5 V, CL = 50 pF, TA = 25°C | 4 | |
| Propagation Delay A to Y | tPLH, tPHL | 5.6 | 8 | ns | VCC = 3.3 ± 0.3 V, CL = 15 pF, TA = 25°C | 4 | |
| Propagation Delay A to Y | tPLH, tPHL | 8.1 | 11.5 | ns | VCC = 3.3 ± 0.3 V, CL = 50 pF, TA = 25°C | 4 | |
| Output Enable Time OE to Y | tPZL, tPZH | 3.6 | 5.1 | ns | VCC = 5.0 ± 0.5 V, CL = 15 pF, RL = 1.0 kΩ, TA = 25°C | 4 | |
| Output Enable Time OE to Y | tPZL, tPZH | 5.1 | 7.1 | ns | VCC = 5.0 ± 0.5 V, CL = 50 pF, RL = 1.0 kΩ, TA = 25°C | 4 | |
| Output Enable Time OE to Y | tPZL, tPZH | 5.4 | 8 | ns | VCC = 3.3 ± 0.3 V, CL = 15 pF, RL = 1.0 kΩ, TA = 25°C | 4 | |
| Output Enable Time OE to Y | tPZL, tPZH | 7.9 | 11.5 | ns | VCC = 3.3 ± 0.3 V, CL = 50 pF, RL = 1.0 kΩ, TA = 25°C | 4 | |
| Output Disable Time OE to Y | tPLZ, tPHZ | 6.1 | 8.8 | ns | VCC = 5.0 ± 0.5 V, CL = 50 pF, RL = 1.0 kΩ, TA = 25°C | 4 | |
| Output Disable Time OE to Y | tPLZ, tPHZ | 9.5 | 13.2 | ns | VCC = 3.3 ± 0.3 V, CL = 50 pF, RL = 1.0 kΩ, TA = 25°C | 4 | |
| Output-to-Output Skew | tOSLH, tOSHL | 1 | ns | VCC = 5.0 ± 0.5 V, CL = 50 pF (Note 1), TA = 25°C | 4 | ||
| Output-to-Output Skew | tOSLH, tOSHL | 1.5 | ns | VCC = 3.3 ± 0.3 V, CL = 50 pF (Note 1), TA = 25°C | 4 | ||
| Maximum Input Capacitance | Cin | 4 | 10 | pF | TA = 25°C | 4 | |
| Maximum Three-State Output Capacitance | Cout | 6 | pF | Output in High Impedance State, TA = 25°C | 4 | ||
| Power Dissipation Capacitance | CPD | 14 | pF | Typical @ 25°C, VCC = 5.0V (Note 2) | 4 | ||
| Quiet Output Maximum Dynamic VOL | VOLP | 0.3 | 0.8 | V | CL = 50 pF, VCC = 5.0 V, TA = 25°C | 4 | |
| Quiet Output Minimum Dynamic VOL | VOLV | -0.3 | -0.8 | V | CL = 50 pF, VCC = 5.0 V, TA = 25°C | 4 | |
| Minimum High Level Dynamic Input Voltage | VIHD | 3.5 | V | CL = 50 pF, VCC = 5.0 V, TA = 25°C | 4 | ||
| Maximum Low Level Dynamic Input Voltage | VILD | 1.5 | V | CL = 50 pF, VCC = 5.0 V, TA = 25°C | 4 |
CAD (KiCad official)
- Symbol:
MC74VHCT125ADTRG - Footprint:
Package_SO:TSSOP-14_4.4x5mm_P0.65mm - 3D model: TSSOP-14 (KiCad packages3D, STEP)
- 3D model files:
mc74vhct125adtrg-etched.step/mc74vhct125adtrg-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mc74vhct125adtrg.step/mc74vhct125adtrg.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: onsemi datasheet (9 pp, sha256
a68b3761b2b7673e, retrieved 2026-10-23, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).