# MC74VHC541DWR2G

**onsemi** · Buffers / Drivers · SOIC-20-300mil

MC74VHC541DWR2G from onsemi, in a SOIC-20-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OE1 | input | Output enable 1; when OE1 or OE2 is high the Y outputs are in the high-impedance state. |
| 2 | A1 | input | Data input 1, tolerates voltages up to 7.0 V, noninverting to Y1. |
| 3 | A2 | input | Data input 2, tolerates voltages up to 7.0 V, noninverting to Y2. |
| 4 | A3 | input | Data input 3, tolerates voltages up to 7.0 V, noninverting to Y3. |
| 5 | A4 | input | Data input 4, tolerates voltages up to 7.0 V, noninverting to Y4. |
| 6 | A5 | input | Data input 5, tolerates voltages up to 7.0 V, noninverting to Y5. |
| 7 | A6 | input | Data input 6, tolerates voltages up to 7.0 V, noninverting to Y6. |
| 8 | A7 | input | Data input 7, tolerates voltages up to 7.0 V, noninverting to Y7. |
| 9 | A8 | input | Data input 8, tolerates voltages up to 7.0 V, noninverting to Y8. |
| 10 | GND | power_in | Ground pin (0 V reference). |
| 11 | Y8 | tri_state | Noninverting 3-state output 8 following A8, high impedance when OE1 or OE2 is high. |
| 12 | Y7 | tri_state | Noninverting 3-state output 7 following A7, high impedance when OE1 or OE2 is high. |
| 13 | Y6 | tri_state | Noninverting 3-state output 6 following A6, high impedance when OE1 or OE2 is high. |
| 14 | Y5 | tri_state | Noninverting 3-state output 5 following A5, high impedance when OE1 or OE2 is high. |
| 15 | Y4 | tri_state | Noninverting 3-state output 4 following A4, high impedance when OE1 or OE2 is high. |
| 16 | Y3 | tri_state | Noninverting 3-state output 3 following A3, high impedance when OE1 or OE2 is high. |
| 17 | Y2 | tri_state | Noninverting 3-state output 2 following A2, high impedance when OE1 or OE2 is high. |
| 18 | Y1 | tri_state | Noninverting 3-state output 1 following A1, high impedance when OE1 or OE2 is high. |
| 19 | OE2 | input | Output enable 2; when OE1 or OE2 is high the Y outputs are in the high-impedance state. |
| 20 | VCC | power_in | Positive supply, recommended 2.0 V to 5.5 V (absolute maximum 7.0 V). |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | SOIC-20-300mil |
| Category | Logic ICs |
| Pins | 20 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| DC Supply Voltage (abs max) | VCC | -0.5 |  | 7 | V |  | 2 |
| DC Input Voltage (abs max) | Vin | -0.5 |  | 7 | V |  | 2 |
| DC Output Voltage (abs max) | Vout | -0.5 |  |  | V | max is VCC + 0.5 V | 2 |
| Input Diode Current | IIK | -20 |  |  | mA |  | 2 |
| Output Diode Current | IOK | -20 |  | 20 | mA |  | 2 |
| DC Output Current, per Pin | Iout | -25 |  | 25 | mA |  | 2 |
| DC Supply Current, VCC and GND Pins | ICC | -50 |  | 50 | mA |  | 2 |
| Power Dissipation in Still Air, SOIC Package | PD |  |  | 500 | mW | Derating -7 mW/C from 65 to 125C | 2 |
| Storage Temperature | Tstg | -65 |  | 150 | C |  | 2 |
| DC Supply Voltage (recommended) | VCC | 2 |  | 5.5 | V |  | 2 |
| DC Input Voltage (recommended) | Vin | 0 |  | 5.5 | V |  | 2 |
| DC Output Voltage (recommended) | Vout | 0 |  |  | V | max is VCC | 2 |
| Operating Temperature, All Package Types | TA | -55 |  | 125 | C |  | 2 |
| Input Rise and Fall Time | tr, tf | 0 |  | 100 | ns/V | VCC = 3.3V ±0.3V | 2 |
| Input Rise and Fall Time | tr, tf | 0 |  | 20 | ns/V | VCC = 5.0V ±0.5V | 2 |
| Minimum High-Level Input Voltage | VIH | 1.5 |  |  | V | VCC = 2.0 V, TA = 25°C and -55 to 125°C | 2 |
| Maximum Low-Level Input Voltage | VIL |  |  | 0.5 | V | VCC = 2.0 V, TA = 25°C and -55 to 125°C | 2 |
| Minimum High-Level Output Voltage | VOH | 1.9 | 2 |  | V | Vin = VIH or VIL, IOH = -50µA, VCC = 2.0 V, TA = 25°C (min 1.9 also at -55 to 125°C) | 2 |
| Minimum High-Level Output Voltage | VOH | 2.9 | 3 |  | V | Vin = VIH or VIL, IOH = -50µA, VCC = 3.0 V, TA = 25°C (min 2.9 also at -55 to 125°C) | 2 |
| Minimum High-Level Output Voltage | VOH | 4.4 | 4.5 |  | V | Vin = VIH or VIL, IOH = -50µA, VCC = 4.5 V, TA = 25°C (min 4.4 also at -55 to 125°C) | 2 |
| Minimum High-Level Output Voltage | VOH | 2.58 |  |  | V | Vin = VIH or VIL, IOH = -4mA, VCC = 3.0 V, TA = 25°C | 2 |
| Minimum High-Level Output Voltage | VOH | 2.48 |  |  | V | Vin = VIH or VIL, IOH = -4mA, VCC = 3.0 V, TA = -55 to 125°C | 2 |
| Minimum High-Level Output Voltage | VOH | 3.94 |  |  | V | Vin = VIH or VIL, IOH = -8mA, VCC = 4.5 V, TA = 25°C | 2 |
| Minimum High-Level Output Voltage | VOH | 3.8 |  |  | V | Vin = VIH or VIL, IOH = -8mA, VCC = 4.5 V, TA = -55 to 125°C | 2 |
| Maximum Low-Level Output Voltage | VOL |  | 0 | 0.1 | V | Vin = VIH or VIL, IOL = 50µA, VCC = 2.0/3.0/4.5 V, TA = 25°C (max 0.1 also at -55 to 125°C) | 2 |
| Maximum Low-Level Output Voltage | VOL |  |  | 0.36 | V | Vin = VIH or VIL, IOL = 4mA, VCC = 3.0 V, TA = 25°C | 2 |
| Maximum Low-Level Output Voltage | VOL |  |  | 0.44 | V | Vin = VIH or VIL, IOL = 4mA, VCC = 3.0 V, TA = -55 to 125°C | 2 |
| Maximum Input Leakage Current | Iin | -0.1 |  | 0.1 | µA | Vin = 5.5V or GND, VCC = 0 to 5.5 V, TA = 25°C | 2 |
| Maximum Input Leakage Current | Iin | -1 |  | 1 | µA | Vin = 5.5V or GND, VCC = 0 to 5.5 V, TA = -55 to 125°C | 2 |
| Maximum 3-State Leakage Current | IOZ | -0.25 |  | 0.25 | µA | Vin = VIL or VIH, Vout = VCC or GND, VCC = 5.5 V, TA = 25°C | 2 |
| Maximum 3-State Leakage Current | IOZ | -2.5 |  | 2.5 | µA | Vin = VIL or VIH, Vout = VCC or GND, VCC = 5.5 V, TA = -55 to 125°C | 2 |
| Maximum Quiescent Supply Current | ICC |  |  | 4 | µA | Vin = VCC or GND, VCC = 5.5 V, TA = 25°C | 2 |
| Maximum Quiescent Supply Current | ICC |  |  | 40 | µA | Vin = VCC or GND, VCC = 5.5 V, TA = -55 to 125°C | 2 |
| Propagation Delay A to Y | tPLH, tPHL |  | 5 | 7 | ns | VCC = 3.3 ± 0.3V, CL = 15pF, TA = 25°C | 3 |
| Propagation Delay A to Y | tPLH, tPHL |  | 7.5 | 10.5 | ns | VCC = 3.3 ± 0.3V, CL = 50pF, TA = 25°C | 3 |
| Propagation Delay A to Y | tPLH, tPHL | 1 |  | 8.5 | ns | VCC = 3.3 ± 0.3V, CL = 15pF, TA = -55 to 125°C | 3 |
| Propagation Delay A to Y | tPLH, tPHL | 1 |  | 12 | ns | VCC = 3.3 ± 0.3V, CL = 50pF, TA = -55 to 125°C | 3 |
| Propagation Delay A to Y | tPLH, tPHL |  | 3.5 | 5 | ns | VCC = 5.0 ± 0.5V, CL = 15pF, TA = 25°C | 3 |
| Propagation Delay A to Y | tPLH, tPHL | 1 |  | 6 | ns | VCC = 5.0 ± 0.5V, CL = 15pF, TA = -55 to 125°C | 3 |
| Propagation Delay A to Y | tPLH, tPHL | 1 |  | 8 | ns | VCC = 5.0 ± 0.5V, CL = 50pF, TA = -55 to 125°C | 3 |
| Output Enable Time OE to Y | tPZL, tPZH |  | 6.8 | 10.5 | ns | VCC = 3.3 ± 0.3V, CL = 15pF, RL = 1k, TA = 25°C | 3 |
| Output Enable Time OE to Y | tPZL, tPZH |  | 9.3 | 14 | ns | VCC = 3.3 ± 0.3V, CL = 50pF, RL = 1k, TA = 25°C | 3 |
| Output Enable Time OE to Y | tPZL, tPZH | 1 |  | 16 | ns | VCC = 3.3 ± 0.3V, CL = 50pF, RL = 1k, TA = -55 to 125°C | 3 |
| Output Enable Time OE to Y | tPZL, tPZH |  | 4.7 | 7.2 | ns | VCC = 5.0 ± 0.5V, CL = 15pF, RL = 1k, TA = 25°C | 3 |
| Output Enable Time OE to Y | tPZL, tPZH |  | 6.2 | 9.2 | ns | VCC = 5.0 ± 0.5V, CL = 50pF, RL = 1k, TA = 25°C | 3 |
| Output Enable Time OE to Y | tPZL, tPZH | 1 |  | 10.5 | ns | VCC = 5.0 ± 0.5V, CL = 50pF, RL = 1k, TA = -55 to 125°C | 3 |
| Output Disable Time OE to Y | tPLZ, tPHZ |  | 11.2 | 15.4 | ns | VCC = 3.3 ± 0.3V, CL = 50pF, RL = 1k, TA = 25°C | 3 |
| Output Disable Time OE to Y | tPLZ, tPHZ | 1 |  | 17.5 | ns | VCC = 3.3 ± 0.3V, CL = 50pF, RL = 1k, TA = -55 to 125°C | 3 |
| Output Disable Time OE to Y | tPLZ, tPHZ |  | 6 | 8.8 | ns | VCC = 5.0 ± 0.5V, CL = 50pF, RL = 1k, TA = 25°C | 3 |
| Output Disable Time OE to Y | tPLZ, tPHZ | 1 |  | 10 | ns | VCC = 5.0 ± 0.5V, CL = 50pF, RL = 1k, TA = -55 to 125°C | 3 |
| Output to Output Skew | tOSLH, tOSHL |  |  | 1.5 | ns | VCC = 3.3 ± 0.3V, CL = 50pF (Note 1) | 3 |
| Output to Output Skew | tOSLH, tOSHL |  |  | 1 | ns | VCC = 5.0 ± 0.5V, CL = 50pF (Note 1) | 3 |
| Maximum Input Capacitance | Cin |  | 4 | 10 | pF | TA = 25°C (max 10 also at -55 to 125°C) | 3 |
| Maximum Three-State Output Capacitance | Cout |  | 6 |  | pF | Output in high impedance state | 3 |
| Power Dissipation Capacitance | CPD |  | 18 |  | pF | Typical @ 25°C, VCC = 5.0V | 3 |
| Quiet Output Maximum Dynamic VOL | VOLP |  | 0.9 | 1.2 | V | tr = tf = 3.0ns, CL = 50pF, VCC = 5.0V, TA = 25°C | 3 |
| Quiet Output Minimum Dynamic VOL | VOLV | -1.2 | -0.9 |  | V | tr = tf = 3.0ns, CL = 50pF, VCC = 5.0V, TA = 25°C | 3 |
| Minimum High Level Dynamic Input Voltage | VIHD | 3.5 |  |  | V | tr = tf = 3.0ns, CL = 50pF, VCC = 5.0V, TA = 25°C | 3 |
| Maximum Low Level Dynamic Input Voltage | VILD |  |  | 1.5 | V | tr = tf = 3.0ns, CL = 50pF, VCC = 5.0V, TA = 25°C | 3 |

## CAD (KiCad official)

- Symbol: `MC74VHC541DWR2G`
- Footprint: `Package_SO:SOIC-20W_7.5x12.8mm_P1.27mm`
- 3D model: SOIC-20-300mil (KiCad packages3D, STEP)
- 3D model files: `mc74vhc541dwr2g-etched.step` / `mc74vhc541dwr2g-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `mc74vhc541dwr2g.step` / `mc74vhc541dwr2g.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [onsemi datasheet](https://www.onsemi.com/pdf/datasheet/mc74vhc541dwr2-d.pdf) (7 pp, sha256 `65c4fa0d7f40fffd`, retrieved 2026-10-23, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/mc74vhc541dwr2g-datasheet.pdf)