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Ray Publish 0.1.0 b34da7e 7d ago

MC74VHC540DTR2G

onsemi · Buffers, Drivers, Receivers, Transceivers · TSSOP-20

MC74VHC540DTR2G from onsemi, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OE1 input Active-low output enable 1, ANDed with OE2; when OE1 or OE2 is high the terminal outputs are forced to the high-impedance state.
2 A1 input Data input A1 tolerates up to 7.0 V and must be held within GND to VCC for proper operation, with unused inputs tied to GND or VCC.
3 A2 input Data input A2 tolerates up to 7.0 V and must be held within GND to VCC for proper operation, with unused inputs tied to GND or VCC.
4 A3 input Data input A3 tolerates up to 7.0 V and must be held within GND to VCC for proper operation, with unused inputs tied to GND or VCC.
5 A4 input Data input A4 tolerates up to 7.0 V and must be held within GND to VCC for proper operation, with unused inputs tied to GND or VCC.
6 A5 input Data input A5 tolerates up to 7.0 V and must be held within GND to VCC for proper operation, with unused inputs tied to GND or VCC.
7 A6 input Data input A6 tolerates up to 7.0 V and must be held within GND to VCC for proper operation, with unused inputs tied to GND or VCC.
8 A7 input Data input A7 tolerates up to 7.0 V and must be held within GND to VCC for proper operation, with unused inputs tied to GND or VCC.
9 A8 input Data input A8 tolerates up to 7.0 V and must be held within GND to VCC for proper operation, with unused inputs tied to GND or VCC.
10 GND power_in Ground reference; Vin and Vout must be constrained to the range GND to VCC for proper operation.
11 Y8 tri_state Inverting three-state output Y8 is high-impedance when either output enable is high, and unused outputs must be left open; rated ±25 mA per pin.
12 Y7 tri_state Inverting three-state output Y7 is high-impedance when either output enable is high, and unused outputs must be left open; rated ±25 mA per pin.
13 Y6 tri_state Inverting three-state output Y6 is high-impedance when either output enable is high, and unused outputs must be left open; rated ±25 mA per pin.
14 Y5 tri_state Inverting three-state output Y5 is high-impedance when either output enable is high, and unused outputs must be left open; rated ±25 mA per pin.
15 Y4 tri_state Inverting three-state output Y4 is high-impedance when either output enable is high, and unused outputs must be left open; rated ±25 mA per pin.
16 Y3 tri_state Inverting three-state output Y3 is high-impedance when either output enable is high, and unused outputs must be left open; rated ±25 mA per pin.
17 Y2 tri_state Inverting three-state output Y2 is high-impedance when either output enable is high, and unused outputs must be left open; rated ±25 mA per pin.
18 Y1 tri_state Inverting three-state output Y1 is high-impedance when either output enable is high, and unused outputs must be left open; rated ±25 mA per pin.
19 OE2 input Active-low output enable 2, ANDed with OE1; when OE1 or OE2 is high the terminal outputs are forced to the high-impedance state.
20 VCC power_in Positive supply; recommended operating range 2.0 V to 5.5 V, with absolute maximum 7.0 V.

Key specifications

Parameter Value
Manufacturer onsemi
Package TSSOP-20
Category Logic
Pins 20

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
DC Supply Voltage VCC 2 5.5 V 2
DC Input Voltage Vin 0 5.5 V 2
DC Output Voltage Vout 0 V max printed as VCC 2
Operating Temperature, All Package Types TA -55 125 °C 2
Input Rise and Fall Time tr, tf 0 100 ns/V VCC = 3.3 V ±0.3 V (Figure 1) 2
Input Rise and Fall Time tr, tf 0 20 ns/V VCC = 5.0 V ±0.5 V (Figure 1) 2
DC Supply Voltage VCC -0.5 7 V 2
DC Input Voltage Vin -0.5 7 V 2
DC Output Voltage Vout -0.5 V max printed as VCC + 0.5 2
Input Diode Current IIK -20 mA 2
Output Diode Current IOK -20 20 mA 2
DC Output Current, per Pin Iout -25 25 mA 2
DC Supply Current, VCC and GND Pins ICC -75 75 mA 2
Power Dissipation in Still Air, TSSOP Package PD 450 mW TSSOP package, still air 2
Storage Temperature Tstg -65 150 °C 2
Minimum High-Level Input Voltage VIH 1.5 V VCC = 2.0 V, TA = 25°C 2
Maximum Low-Level Input Voltage VIL 0.5 V VCC = 2.0 V, TA = 25°C 2
Minimum High-Level Output Voltage VOH 1.9 V Vin = VIH or VIL, IOH = -50 μA, VCC = 2.0 V, TA = 25°C 2
Minimum High-Level Output Voltage VOH 2.9 V Vin = VIH or VIL, IOH = -50 μA, VCC = 3.0 V, TA = 25°C 2
Minimum High-Level Output Voltage VOH 4.4 V Vin = VIH or VIL, IOH = -50 μA, VCC = 4.5 V, TA = 25°C 2
Minimum High-Level Output Voltage VOH 2.58 V Vin = VIH or VIL, IOH = -4 mA, VCC = 3.0 V, TA = 25°C 2
Minimum High-Level Output Voltage VOH 2.48 V Vin = VIH or VIL, IOH = -4 mA, VCC = 3.0 V, TA = -55 to 125°C 2
Minimum High-Level Output Voltage VOH 3.94 V Vin = VIH or VIL, IOH = -8 mA, VCC = 4.5 V, TA = 25°C 2
Minimum High-Level Output Voltage VOH 3.8 V Vin = VIH or VIL, IOH = -8 mA, VCC = 4.5 V, TA = -55 to 125°C 2
Maximum Low-Level Output Voltage VOL 0.1 V Vin = VIH or VIL, IOL = 50 μA, VCC = 2.0, 3.0, 4.5 V, TA = 25°C 2
Maximum Low-Level Output Voltage VOL 0.36 V Vin = VIH or VIL, IOL = 4 mA, VCC = 3.0 V, TA = 25°C 2
Maximum Low-Level Output Voltage VOL 0.44 V Vin = VIH or VIL, IOL = 4 mA, VCC = 3.0 V, TA = -55 to 125°C 2
Maximum Input Leakage Current Iin -0.1 0.1 μA Vin = 5.5 V or GND, VCC = 0 to 5.5 V, TA = 25°C 3
Maximum Input Leakage Current Iin -1 1 μA Vin = 5.5 V or GND, VCC = 0 to 5.5 V, TA = -55 to 125°C 3
Maximum Three-State Leakage Current IOZ -0.25 0.25 μA Vin = VIL or VIH, Vout = VCC or GND, VCC = 5.5 V, TA = 25°C 3
Maximum Three-State Leakage Current IOZ -2.5 2.5 μA Vin = VIL or VIH, Vout = VCC or GND, VCC = 5.5 V, TA = -55 to 125°C 3
Maximum Quiescent Supply Current ICC 4 μA Vin = VCC or GND, VCC = 5.5 V, TA = 25°C 3
Maximum Quiescent Supply Current ICC 40 μA Vin = VCC or GND, VCC = 5.5 V, TA = -55 to 125°C 3
Maximum Propagation Delay, A to Y tPLH, tPHL 1 8.5 ns VCC = 3.3 ±0.3 V, CL = 15 pF, TA = -55 to 125°C 3
Maximum Propagation Delay, A to Y tPLH, tPHL 1 12 ns VCC = 3.3 ±0.3 V, CL = 50 pF, TA = -55 to 125°C 3
Maximum Propagation Delay, A to Y tPLH, tPHL 1 6 ns VCC = 5.0 ±0.5 V, CL = 15 pF, TA = -55 to 125°C 3
Maximum Propagation Delay, A to Y tPLH, tPHL 1 8 ns VCC = 5.0 ±0.5 V, CL = 50 pF, TA = -55 to 125°C 3
Output Enable Time, OEn to Y tPZL, tPZH 1 12.5 ns VCC = 3.3 ±0.3 V, CL = 15 pF, RL = 1 kΩ, TA = -55 to 125°C 3
Output Enable Time, OEn to Y tPZL, tPZH 1 16 ns VCC = 3.3 ±0.3 V, CL = 50 pF, RL = 1 kΩ, TA = -55 to 125°C 3
Output Enable Time, OEn to Y tPZL, tPZH 1 8.5 ns VCC = 5.0 ±0.5 V, CL = 15 pF, RL = 1 kΩ, TA = -55 to 125°C 3
Output Enable Time, OEn to Y tPZL, tPZH 1 10.5 ns VCC = 5.0 ±0.5 V, CL = 50 pF, RL = 1 kΩ, TA = -55 to 125°C 3
Output Disable Time, OEn to Y tPLZ, tPHZ 1 17.5 ns VCC = 3.3 ±0.3 V, CL = 50 pF, RL = 1 kΩ, TA = -55 to 125°C 3
Output Disable Time, OEn to Y tPLZ, tPHZ 1 10 ns VCC = 5.0 ±0.5 V, CL = 50 pF, RL = 1 kΩ, TA = -55 to 125°C 3
Output to Output Skew tOSLH, tOSHL 1.5 ns VCC = 3.3 ±0.3 V, CL = 50 pF (Note 1) 3
Output to Output Skew tOSLH, tOSHL 1 ns VCC = 5.0 ±0.5 V, CL = 50 pF (Note 1) 3
Maximum Input Capacitance Cin 4 10 pF TA = 25°C 3
Maximum Three-State Output Capacitance (Output in High Impedance State) Cout 6 pF Output in high-impedance state 3
Quiet Output Maximum Dynamic VOL VOLP 0.9 1.2 V Input tr = tf = 3.0 ns, CL = 50 pF, VCC = 5.0 V, TA = 25°C 3
Quiet Output Minimum Dynamic VOL VOLV -0.9 -1.2 V Input tr = tf = 3.0 ns, CL = 50 pF, VCC = 5.0 V, TA = 25°C 3
Minimum High Level Dynamic Input Voltage VIHD 3.5 V Input tr = tf = 3.0 ns, CL = 50 pF, VCC = 5.0 V, TA = 25°C 3
Maximum Low Level Dynamic Input Voltage VILD 1.5 V Input tr = tf = 3.0 ns, CL = 50 pF, VCC = 5.0 V, TA = 25°C 3

CAD (KiCad official)

  • Symbol: MC74VHC540DTR2G
  • Footprint: Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm
  • 3D model: TSSOP-20 (KiCad packages3D, STEP)
  • 3D model files: mc74vhc540dtr2g-etched.step / mc74vhc540dtr2g-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mc74vhc540dtr2g.step / mc74vhc540dtr2g.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (8 pp, sha256 658a08d2dba59491, retrieved 2026-10-21, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF