component
MC74VHC4051DR2G
Public Made by Adomby adom
onsemi Signal Switches, Multiplexers, Decoders, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
MC74VHC4051DR2G
onsemi · Signal Switches, Multiplexers, Decoders · SOIC-16
MC74VHC4051DR2G from onsemi, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | X4 | passive | Analog input/output channel X4 of the VHC4051; analog voltages may vary across the supply range from VEE to VCC, and unused channels may be left floating. |
| 2 | X6 | passive | Analog input/output channel X6; analog voltages may vary across the supply range from VEE to VCC, and unused channels may be left floating. |
| 3 | X | passive | Common analog output/input of the multiplexer, connected to one of channels X0 to X7 selected by A, B and C when Enable is LOW. |
| 4 | X7 | passive | Analog input/output channel X7; analog voltages may vary across the supply range from VEE to VCC, and unused channels may be left floating. |
| 5 | X5 | passive | Analog input/output channel X5; analog voltages may vary across the supply range from VEE to VCC, and unused channels may be left floating. |
| 6 | Enable | input | Active-high enable; when HIGH all analog switches are turned off, and the input is CMOS-compatible with a pull-up resistor needed for LSTTL outputs. |
| 7 | VEE | power_in | Negative analog supply, 0 to −6 V relative to GND with VEE ≤ GND, giving a VCC − VEE range of 2 to 12 V. |
| 8 | GND | power_in | Digital ground reference; VCC − GND must be 2 to 6 V and VEE − GND 0 to −6 V. |
| 9 | C | input | Channel-select input C (most significant select bit) that must be driven at VCC or GND logic levels. |
| 10 | B | input | Channel-select input B that must be driven at VCC or GND logic levels. |
| 11 | A | input | Channel-select input A (least significant select bit) that must be driven at VCC or GND logic levels. |
| 12 | X3 | passive | Analog input/output channel X3; analog voltages may vary across the supply range from VEE to VCC, and unused channels may be left floating. |
| 13 | X0 | passive | Analog input/output channel X0; analog voltages may vary across the supply range from VEE to VCC, and unused channels may be left floating. |
| 14 | X1 | passive | Analog input/output channel X1; analog voltages may vary across the supply range from VEE to VCC, and unused channels may be left floating. |
| 15 | X2 | passive | Analog input/output channel X2; analog voltages may vary across the supply range from VEE to VCC, and unused channels may be left floating. |
| 16 | VCC | power_in | Positive supply, 2 to 6 V relative to GND for digital control and up to 12 V above VEE for the analog switches (VCC − VEE = 2 to 12 V). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | SOIC-16 |
| Category | Logic |
| Pins | 16 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Positive DC Supply Voltage (referenced to GND) | VCC | 2 | 6 | V | Referenced to GND | 4 | |
| Positive DC Supply Voltage (referenced to VEE) | VCC | 2 | 12 | V | Referenced to VEE | 4 | |
| Negative DC Supply Voltage, Output (referenced to GND) | VEE | -6 | V | Maximum printed as GND | 4 | ||
| Static or Dynamic Voltage Across Switch | VIO | 1.2 | V | 4 | |||
| Operating Temperature Range, All Package Types | TA | -55 | 125 | °C | 4 | ||
| Input Rise/Fall Time (Channel Select or Enable Inputs) | tr, tf | 0 | 1000 | ns | VCC = 2.0 V | 4 | |
| Input Rise/Fall Time (Channel Select or Enable Inputs) | tr, tf | 0 | 800 | ns | VCC = 3.0 V | 4 | |
| Input Rise/Fall Time (Channel Select or Enable Inputs) | tr, tf | 0 | 500 | ns | VCC = 4.5 V | 4 | |
| Input Rise/Fall Time (Channel Select or Enable Inputs) | tr, tf | 0 | 400 | ns | VCC = 6.0 V | 4 | |
| Positive DC Supply Voltage (referenced to GND) | VCC | -0.5 | 7 | V | Referenced to GND | 4 | |
| Positive DC Supply Voltage (referenced to VEE) | VCC | -0.5 | 14 | V | Referenced to VEE | 4 | |
| Negative DC Supply Voltage (referenced to GND) | VEE | -7 | 5 | V | Referenced to GND | 4 | |
| DC Current, Into or Out of Any Pin | I | -25 | 25 | mA | 4 | ||
| Power Dissipation in Still Air, SOIC Package | PD | 500 | mW | Still air | 4 | ||
| Storage Temperature Range | Tstg | -65 | 150 | °C | 4 | ||
| Lead Temperature, 1 mm from Case for 10 Seconds | TL | 260 | °C | 1 mm from case, 10 s | 4 | ||
| Minimum High-Level Input Voltage, Channel-Select or Enable Inputs | VIH | 1.5 | V | VCC = 2.0 V; Ron = Per Spec | 5 | ||
| Minimum High-Level Input Voltage, Channel-Select or Enable Inputs | VIH | 2.1 | V | VCC = 3.0 V; Ron = Per Spec | 5 | ||
| Minimum High-Level Input Voltage, Channel-Select or Enable Inputs | VIH | 3.15 | V | VCC = 4.5 V; Ron = Per Spec | 5 | ||
| Minimum High-Level Input Voltage, Channel-Select or Enable Inputs | VIH | 4.2 | V | VCC = 6.0 V; Ron = Per Spec | 5 | ||
| Maximum Low-Level Input Voltage, Channel-Select or Enable Inputs | VIL | 0.5 | V | VCC = 2.0 V; Ron = Per Spec | 5 | ||
| Maximum Low-Level Input Voltage, Channel-Select or Enable Inputs | VIL | 0.9 | V | VCC = 3.0 V; Ron = Per Spec | 5 | ||
| Maximum Low-Level Input Voltage, Channel-Select or Enable Inputs | VIL | 1.35 | V | VCC = 4.5 V; Ron = Per Spec | 5 | ||
| Maximum Low-Level Input Voltage, Channel-Select or Enable Inputs | VIL | 1.8 | V | VCC = 6.0 V; Ron = Per Spec | 5 | ||
| Maximum Input Leakage Current, Channel-Select or Enable Inputs | Iin | -1 | 1 | μA | Vin = VCC or GND; VCC = 6.0 V; VEE = -6.0 V; 125 °C column | 5 | |
| Maximum Quiescent Supply Current (per Package) | ICC | 10 | μA | VCC = 6.0 V; VEE = GND; Channel Select, Enable and VIS = VCC or GND; VIO = 0 V; 125 °C column | 5 | ||
| Maximum Quiescent Supply Current (per Package) | ICC | 80 | μA | VCC = 6.0 V; VEE = -6.0 V; Channel Select, Enable and VIS = VCC or GND; VIO = 0 V; 125 °C column | 5 | ||
| Maximum ON Resistance | Ron | 320 | Ω | VCC = 3.0 V, VEE = 0.0 V; Vin = VIL or VIH; VIS = VCC to VEE; IS ≤ 2.0 mA; 125 °C column | 5 | ||
| Maximum ON Resistance | Ron | 280 | Ω | VCC = 4.5 V, VEE = 0.0 V; Vin = VIL or VIH; VIS = VCC to VEE; IS ≤ 2.0 mA; 125 °C column | 5 | ||
| Maximum ON Resistance | Ron | 170 | Ω | VCC = 4.5 V, VEE = -4.5 V; Vin = VIL or VIH; VIS = VCC to VEE; IS ≤ 2.0 mA; 125 °C column | 5 | ||
| Maximum ON Resistance | Ron | 140 | Ω | VCC = 6.0 V, VEE = -6.0 V; Vin = VIL or VIH; VIS = VCC to VEE; IS ≤ 2.0 mA; 125 °C column | 5 | ||
| Maximum ON Resistance (endpoints) | Ron | 230 | Ω | VCC = 3.0 V, VEE = 0.0 V; Vin = VIL or VIH; VIS = VCC or VEE; IS ≤ 2.0 mA; 125 °C column | 5 | ||
| Maximum ON Resistance (endpoints) | Ron | 190 | Ω | VCC = 4.5 V, VEE = 0.0 V; Vin = VIL or VIH; VIS = VCC or VEE; IS ≤ 2.0 mA; 125 °C column | 5 | ||
| Maximum ON Resistance (endpoints) | Ron | 140 | Ω | VCC = 4.5 V, VEE = -4.5 V; Vin = VIL or VIH; VIS = VCC or VEE; IS ≤ 2.0 mA; 125 °C column | 5 | ||
| Maximum ON Resistance (endpoints) | Ron | 115 | Ω | VCC = 6.0 V, VEE = -6.0 V; Vin = VIL or VIH; VIS = VCC or VEE; IS ≤ 2.0 mA; 125 °C column | 5 | ||
| Maximum Off-Channel Leakage Current, Any One Channel | Ioff | 1 | μA | VCC = 6.0 V, VEE = -6.0 V; Vin = VIL or VIH; VIO = VCC − VEE; Switch Off (Figure 12); 125 °C column | 5 | ||
| Maximum Off-Channel Leakage Current, Common Channel (VHC4051) | 4 | μA | VCC = 6.0 V, VEE = -6.0 V; Vin = VIL or VIH; VIO = VCC − VEE; Switch Off (Figure 13); 125 °C column | 5 | |||
| Maximum On-Channel Leakage Current, Channel-to-Channel (VHC4051) | Ion | 4 | μA | VCC = 6.0 V, VEE = -6.0 V; Vin = VIL or VIH; Switch-to-Switch = VCC − VEE (Figure 14); 125 °C column | 5 | ||
| Maximum Input Capacitance, Channel-Select or Enable Inputs | Cin | 10 | pF | 6 | |||
| Maximum Capacitance Analog I/O (All Switches Off) | CI/O | 35 | pF | All switches off | 6 | ||
| Maximum Capacitance Common O/I (VHC4051, All Switches Off) | CI/O | 130 | pF | VHC4051; all switches off | 6 | ||
| Feedthrough Capacitance | 1 | pF | All switches off | 6 | |||
| Maximum Propagation Delay, Channel-Select to Analog Output | tPLH, tPHL | 350 | ns | VCC = 2.0 V; CL = 50 pF; 125 °C column | 6 | ||
| Maximum Propagation Delay, Channel-Select to Analog Output | tPLH, tPHL | 125 | ns | VCC = 3.0 V; CL = 50 pF; 125 °C column | 6 | ||
| Maximum Propagation Delay, Channel-Select to Analog Output | tPLH, tPHL | 85 | ns | VCC = 4.5 V; CL = 50 pF; 125 °C column | 6 | ||
| Maximum Propagation Delay, Channel-Select to Analog Output | tPLH, tPHL | 75 | ns | VCC = 6.0 V; CL = 50 pF; 125 °C column | 6 | ||
| Maximum Propagation Delay, Analog Input to Analog Output | tPLH, tPHL | 70 | ns | VCC = 2.0 V; CL = 50 pF; 125 °C column | 6 | ||
| Maximum Propagation Delay, Analog Input to Analog Output | tPLH, tPHL | 32 | ns | VCC = 3.0 V; CL = 50 pF; 125 °C column | 6 | ||
| Maximum Propagation Delay, Analog Input to Analog Output | tPLH, tPHL | 18 | ns | VCC = 4.5 V; CL = 50 pF; 125 °C column | 6 | ||
| Maximum Propagation Delay, Analog Input to Analog Output | tPLH, tPHL | 15 | ns | VCC = 6.0 V; CL = 50 pF; 125 °C column | 6 | ||
| Maximum Propagation Delay, Enable to Analog Output (high-impedance) | tPLZ, tPHZ | 220 | ns | VCC = 2.0 V; CL = 50 pF; 125 °C column | 6 | ||
| Maximum Propagation Delay, Enable to Analog Output (high-impedance) | tPLZ, tPHZ | 110 | ns | VCC = 3.0 V; CL = 50 pF; 125 °C column | 6 | ||
| Maximum Propagation Delay, Enable to Analog Output (high-impedance) | tPLZ, tPHZ | 76 | ns | VCC = 4.5 V; CL = 50 pF; 125 °C column | 6 | ||
| Maximum Propagation Delay, Enable to Analog Output (high-impedance) | tPLZ, tPHZ | 63 | ns | VCC = 6.0 V; CL = 50 pF; 125 °C column | 6 | ||
| Maximum Propagation Delay, Enable to Analog Output (turn-on) | tPZL, tPZH | 345 | ns | VCC = 2.0 V; CL = 50 pF; 125 °C column | 6 | ||
| Maximum Propagation Delay, Enable to Analog Output (turn-on) | tPZL, tPZH | 155 | ns | VCC = 3.0 V; CL = 50 pF; 125 °C column | 6 | ||
| Maximum Propagation Delay, Enable to Analog Output (turn-on) | tPZL, tPZH | 83 | ns | VCC = 4.5 V; CL = 50 pF; 125 °C column | 6 | ||
| Maximum Propagation Delay, Enable to Analog Output (turn-on) | tPZL, tPZH | 67 | ns | VCC = 6.0 V; CL = 50 pF; 125 °C column | 6 |
CAD (KiCad official)
- Symbol:
MC74VHC4051DR2G - Footprint:
Package_SO:SOIC-16_3.9x9.9mm_P1.27mm - 3D model: SOIC-16 (KiCad packages3D, STEP)
- 3D model files:
mc74vhc4051dr2g-etched.step/mc74vhc4051dr2g-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mc74vhc4051dr2g.step/mc74vhc4051dr2g.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: onsemi datasheet (19 pp, sha256
4ae2350b8cf5f4c4, retrieved 2026-10-18, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# MC74VHC4051DR2G
**onsemi** · Signal Switches, Multiplexers, Decoders · SOIC-16
MC74VHC4051DR2G from onsemi, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | X4 | passive | Analog input/output channel X4 of the VHC4051; analog voltages may vary across the supply range from VEE to VCC, and unused channels may be left floating. |
| 2 | X6 | passive | Analog input/output channel X6; analog voltages may vary across the supply range from VEE to VCC, and unused channels may be left floating. |
| 3 | X | passive | Common analog output/input of the multiplexer, connected to one of channels X0 to X7 selected by A, B and C when Enable is LOW. |
| 4 | X7 | passive | Analog input/output channel X7; analog voltages may vary across the supply range from VEE to VCC, and unused channels may be left floating. |
| 5 | X5 | passive | Analog input/output channel X5; analog voltages may vary across the supply range from VEE to VCC, and unused channels may be left floating. |
| 6 | Enable | input | Active-high enable; when HIGH all analog switches are turned off, and the input is CMOS-compatible with a pull-up resistor needed for LSTTL outputs. |
| 7 | VEE | power_in | Negative analog supply, 0 to −6 V relative to GND with VEE ≤ GND, giving a VCC − VEE range of 2 to 12 V. |
| 8 | GND | power_in | Digital ground reference; VCC − GND must be 2 to 6 V and VEE − GND 0 to −6 V. |
| 9 | C | input | Channel-select input C (most significant select bit) that must be driven at VCC or GND logic levels. |
| 10 | B | input | Channel-select input B that must be driven at VCC or GND logic levels. |
| 11 | A | input | Channel-select input A (least significant select bit) that must be driven at VCC or GND logic levels. |
| 12 | X3 | passive | Analog input/output channel X3; analog voltages may vary across the supply range from VEE to VCC, and unused channels may be left floating. |
| 13 | X0 | passive | Analog input/output channel X0; analog voltages may vary across the supply range from VEE to VCC, and unused channels may be left floating. |
| 14 | X1 | passive | Analog input/output channel X1; analog voltages may vary across the supply range from VEE to VCC, and unused channels may be left floating. |
| 15 | X2 | passive | Analog input/output channel X2; analog voltages may vary across the supply range from VEE to VCC, and unused channels may be left floating. |
| 16 | VCC | power_in | Positive supply, 2 to 6 V relative to GND for digital control and up to 12 V above VEE for the analog switches (VCC − VEE = 2 to 12 V). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | SOIC-16 |
| Category | Logic |
| Pins | 16 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Positive DC Supply Voltage (referenced to GND) | VCC | 2 | | 6 | V | Referenced to GND | 4 |
| Positive DC Supply Voltage (referenced to VEE) | VCC | 2 | | 12 | V | Referenced to VEE | 4 |
| Negative DC Supply Voltage, Output (referenced to GND) | VEE | -6 | | | V | Maximum printed as GND | 4 |
| Static or Dynamic Voltage Across Switch | VIO | | | 1.2 | V | | 4 |
| Operating Temperature Range, All Package Types | TA | -55 | | 125 | °C | | 4 |
| Input Rise/Fall Time (Channel Select or Enable Inputs) | tr, tf | 0 | | 1000 | ns | VCC = 2.0 V | 4 |
| Input Rise/Fall Time (Channel Select or Enable Inputs) | tr, tf | 0 | | 800 | ns | VCC = 3.0 V | 4 |
| Input Rise/Fall Time (Channel Select or Enable Inputs) | tr, tf | 0 | | 500 | ns | VCC = 4.5 V | 4 |
| Input Rise/Fall Time (Channel Select or Enable Inputs) | tr, tf | 0 | | 400 | ns | VCC = 6.0 V | 4 |
| Positive DC Supply Voltage (referenced to GND) | VCC | -0.5 | | 7 | V | Referenced to GND | 4 |
| Positive DC Supply Voltage (referenced to VEE) | VCC | -0.5 | | 14 | V | Referenced to VEE | 4 |
| Negative DC Supply Voltage (referenced to GND) | VEE | -7 | | 5 | V | Referenced to GND | 4 |
| DC Current, Into or Out of Any Pin | I | -25 | | 25 | mA | | 4 |
| Power Dissipation in Still Air, SOIC Package | PD | | | 500 | mW | Still air | 4 |
| Storage Temperature Range | Tstg | -65 | | 150 | °C | | 4 |
| Lead Temperature, 1 mm from Case for 10 Seconds | TL | | | 260 | °C | 1 mm from case, 10 s | 4 |
| Minimum High-Level Input Voltage, Channel-Select or Enable Inputs | VIH | 1.5 | | | V | VCC = 2.0 V; Ron = Per Spec | 5 |
| Minimum High-Level Input Voltage, Channel-Select or Enable Inputs | VIH | 2.1 | | | V | VCC = 3.0 V; Ron = Per Spec | 5 |
| Minimum High-Level Input Voltage, Channel-Select or Enable Inputs | VIH | 3.15 | | | V | VCC = 4.5 V; Ron = Per Spec | 5 |
| Minimum High-Level Input Voltage, Channel-Select or Enable Inputs | VIH | 4.2 | | | V | VCC = 6.0 V; Ron = Per Spec | 5 |
| Maximum Low-Level Input Voltage, Channel-Select or Enable Inputs | VIL | | | 0.5 | V | VCC = 2.0 V; Ron = Per Spec | 5 |
| Maximum Low-Level Input Voltage, Channel-Select or Enable Inputs | VIL | | | 0.9 | V | VCC = 3.0 V; Ron = Per Spec | 5 |
| Maximum Low-Level Input Voltage, Channel-Select or Enable Inputs | VIL | | | 1.35 | V | VCC = 4.5 V; Ron = Per Spec | 5 |
| Maximum Low-Level Input Voltage, Channel-Select or Enable Inputs | VIL | | | 1.8 | V | VCC = 6.0 V; Ron = Per Spec | 5 |
| Maximum Input Leakage Current, Channel-Select or Enable Inputs | Iin | -1 | | 1 | μA | Vin = VCC or GND; VCC = 6.0 V; VEE = -6.0 V; 125 °C column | 5 |
| Maximum Quiescent Supply Current (per Package) | ICC | | | 10 | μA | VCC = 6.0 V; VEE = GND; Channel Select, Enable and VIS = VCC or GND; VIO = 0 V; 125 °C column | 5 |
| Maximum Quiescent Supply Current (per Package) | ICC | | | 80 | μA | VCC = 6.0 V; VEE = -6.0 V; Channel Select, Enable and VIS = VCC or GND; VIO = 0 V; 125 °C column | 5 |
| Maximum ON Resistance | Ron | | | 320 | Ω | VCC = 3.0 V, VEE = 0.0 V; Vin = VIL or VIH; VIS = VCC to VEE; IS ≤ 2.0 mA; 125 °C column | 5 |
| Maximum ON Resistance | Ron | | | 280 | Ω | VCC = 4.5 V, VEE = 0.0 V; Vin = VIL or VIH; VIS = VCC to VEE; IS ≤ 2.0 mA; 125 °C column | 5 |
| Maximum ON Resistance | Ron | | | 170 | Ω | VCC = 4.5 V, VEE = -4.5 V; Vin = VIL or VIH; VIS = VCC to VEE; IS ≤ 2.0 mA; 125 °C column | 5 |
| Maximum ON Resistance | Ron | | | 140 | Ω | VCC = 6.0 V, VEE = -6.0 V; Vin = VIL or VIH; VIS = VCC to VEE; IS ≤ 2.0 mA; 125 °C column | 5 |
| Maximum ON Resistance (endpoints) | Ron | | | 230 | Ω | VCC = 3.0 V, VEE = 0.0 V; Vin = VIL or VIH; VIS = VCC or VEE; IS ≤ 2.0 mA; 125 °C column | 5 |
| Maximum ON Resistance (endpoints) | Ron | | | 190 | Ω | VCC = 4.5 V, VEE = 0.0 V; Vin = VIL or VIH; VIS = VCC or VEE; IS ≤ 2.0 mA; 125 °C column | 5 |
| Maximum ON Resistance (endpoints) | Ron | | | 140 | Ω | VCC = 4.5 V, VEE = -4.5 V; Vin = VIL or VIH; VIS = VCC or VEE; IS ≤ 2.0 mA; 125 °C column | 5 |
| Maximum ON Resistance (endpoints) | Ron | | | 115 | Ω | VCC = 6.0 V, VEE = -6.0 V; Vin = VIL or VIH; VIS = VCC or VEE; IS ≤ 2.0 mA; 125 °C column | 5 |
| Maximum Off-Channel Leakage Current, Any One Channel | Ioff | | | 1 | μA | VCC = 6.0 V, VEE = -6.0 V; Vin = VIL or VIH; VIO = VCC − VEE; Switch Off (Figure 12); 125 °C column | 5 |
| Maximum Off-Channel Leakage Current, Common Channel (VHC4051) | | | | 4 | μA | VCC = 6.0 V, VEE = -6.0 V; Vin = VIL or VIH; VIO = VCC − VEE; Switch Off (Figure 13); 125 °C column | 5 |
| Maximum On-Channel Leakage Current, Channel-to-Channel (VHC4051) | Ion | | | 4 | μA | VCC = 6.0 V, VEE = -6.0 V; Vin = VIL or VIH; Switch-to-Switch = VCC − VEE (Figure 14); 125 °C column | 5 |
| Maximum Input Capacitance, Channel-Select or Enable Inputs | Cin | | | 10 | pF | | 6 |
| Maximum Capacitance Analog I/O (All Switches Off) | CI/O | | | 35 | pF | All switches off | 6 |
| Maximum Capacitance Common O/I (VHC4051, All Switches Off) | CI/O | | | 130 | pF | VHC4051; all switches off | 6 |
| Feedthrough Capacitance | | | | 1 | pF | All switches off | 6 |
| Maximum Propagation Delay, Channel-Select to Analog Output | tPLH, tPHL | | | 350 | ns | VCC = 2.0 V; CL = 50 pF; 125 °C column | 6 |
| Maximum Propagation Delay, Channel-Select to Analog Output | tPLH, tPHL | | | 125 | ns | VCC = 3.0 V; CL = 50 pF; 125 °C column | 6 |
| Maximum Propagation Delay, Channel-Select to Analog Output | tPLH, tPHL | | | 85 | ns | VCC = 4.5 V; CL = 50 pF; 125 °C column | 6 |
| Maximum Propagation Delay, Channel-Select to Analog Output | tPLH, tPHL | | | 75 | ns | VCC = 6.0 V; CL = 50 pF; 125 °C column | 6 |
| Maximum Propagation Delay, Analog Input to Analog Output | tPLH, tPHL | | | 70 | ns | VCC = 2.0 V; CL = 50 pF; 125 °C column | 6 |
| Maximum Propagation Delay, Analog Input to Analog Output | tPLH, tPHL | | | 32 | ns | VCC = 3.0 V; CL = 50 pF; 125 °C column | 6 |
| Maximum Propagation Delay, Analog Input to Analog Output | tPLH, tPHL | | | 18 | ns | VCC = 4.5 V; CL = 50 pF; 125 °C column | 6 |
| Maximum Propagation Delay, Analog Input to Analog Output | tPLH, tPHL | | | 15 | ns | VCC = 6.0 V; CL = 50 pF; 125 °C column | 6 |
| Maximum Propagation Delay, Enable to Analog Output (high-impedance) | tPLZ, tPHZ | | | 220 | ns | VCC = 2.0 V; CL = 50 pF; 125 °C column | 6 |
| Maximum Propagation Delay, Enable to Analog Output (high-impedance) | tPLZ, tPHZ | | | 110 | ns | VCC = 3.0 V; CL = 50 pF; 125 °C column | 6 |
| Maximum Propagation Delay, Enable to Analog Output (high-impedance) | tPLZ, tPHZ | | | 76 | ns | VCC = 4.5 V; CL = 50 pF; 125 °C column | 6 |
| Maximum Propagation Delay, Enable to Analog Output (high-impedance) | tPLZ, tPHZ | | | 63 | ns | VCC = 6.0 V; CL = 50 pF; 125 °C column | 6 |
| Maximum Propagation Delay, Enable to Analog Output (turn-on) | tPZL, tPZH | | | 345 | ns | VCC = 2.0 V; CL = 50 pF; 125 °C column | 6 |
| Maximum Propagation Delay, Enable to Analog Output (turn-on) | tPZL, tPZH | | | 155 | ns | VCC = 3.0 V; CL = 50 pF; 125 °C column | 6 |
| Maximum Propagation Delay, Enable to Analog Output (turn-on) | tPZL, tPZH | | | 83 | ns | VCC = 4.5 V; CL = 50 pF; 125 °C column | 6 |
| Maximum Propagation Delay, Enable to Analog Output (turn-on) | tPZL, tPZH | | | 67 | ns | VCC = 6.0 V; CL = 50 pF; 125 °C column | 6 |
## CAD (KiCad official)
- Symbol: `MC74VHC4051DR2G`
- Footprint: `Package_SO:SOIC-16_3.9x9.9mm_P1.27mm`
- 3D model: SOIC-16 (KiCad packages3D, STEP)
- 3D model files: `mc74vhc4051dr2g-etched.step` / `mc74vhc4051dr2g-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `mc74vhc4051dr2g.step` / `mc74vhc4051dr2g.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [onsemi datasheet](https://www.onsemi.com/pdf/datasheet/mc74vhc4051-d.pdf) (19 pp, sha256 `4ae2350b8cf5f4c4`, retrieved 2026-10-18, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/mc74vhc4051dr2g-datasheet.pdf)