MC74VHC1G08DFT2G

@@ -0,0 +1,46 @@+# MC74VHC1G08DFT2G++**onsemi** · Gates · SOT-353++MC74VHC1G08DFT2G from onsemi, in a SOT-353. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | IN B | input | AND gate input B. CMOS logic input, VIH = 3.15 V min at VCC = 4.5 V, VIL = 1.35 V max at VCC = 4.5 V. Tolerates input voltages up to 7.0 V regardless of VCC, permitting 5 V-to-3 V level shifting. |+| 2 | IN A | input | AND gate input A. CMOS logic input, VIH = 3.15 V min at VCC = 4.5 V, VIL = 1.35 V max at VCC = 4.5 V. Tolerates input voltages up to 7.0 V regardless of VCC. |+| 3 | GND | power_in | Ground reference (0 V) for the device. |+| 4 | OUT Y | output | AND gate output Y (Y = A AND B). Push-pull CMOS output, VOH >= 3.80 V min and VOL <= 0.44 V max at VCC = 4.5 V with +/-8 mA drive. Absolute-max output sink/source current +/-12.5 mA. |+| 5 | VCC | power_in | Positive supply. Recommended operating range 2.0 V to 5.5 V; absolute maximum -0.5 V to 7.0 V. Bypass to GND with a local ceramic capacitor. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | onsemi |+| Package | SOT-353 |+| Category | Logic |+| Pins | 5 |++## Ordering variants++- `MC74VHC1G08DFT2GDFT1G`+- `MC74VHC1G08DFT2GDFT2G`+- `MC74VHC1G08DFT2GDTT1G`++## CAD (KiCad official)++- Symbol: `MC74VHC1G08DFT2G`+- Footprint: `Package_TO_SOT_SMD:SOT-353_SC-70-5`+- 3D model: SOT-353 (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [onsemi datasheet](https://www.onsemi.com/pdf/datasheet/mc74vhc1g08dft2-d.pdf) (6 pp, sha256 `d5e0d4b6e816d1bf`, retrieved 2026-08-17, tier: manufacturer)+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/mc74vhc1g08dft2g-datasheet.pdf)

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