component
MC74VHC157D
Public Made by Adomby adom
onsemi Signal Switches, Multiplexers, Decoders, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownMC74VHC157D
onsemi · Signal Switches, Multiplexers, Decoders · SOIC-16
MC74VHC157D from onsemi, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S | input | Common select input that chooses whether the A or B data inputs are routed to the Y outputs for all four multiplexers; inputs tolerate voltages up to 7 V. |
| 2 | A0 | input | Channel 0 data input A, routed to Y0 when E is Low and S is Low; inputs tolerate voltages up to 7 V. |
| 3 | B0 | input | Channel 0 data input B, routed to Y0 when E is Low and S is High; inputs tolerate voltages up to 7 V. |
| 4 | Y0 | output | Channel 0 multiplexer output, forced Low when E is High; buffered output for high noise immunity. |
| 5 | A1 | input | Channel 1 data input A, routed to Y1 when E is Low and S is Low; inputs tolerate voltages up to 7 V. |
| 6 | B1 | input | Channel 1 data input B, routed to Y1 when E is Low and S is High; inputs tolerate voltages up to 7 V. |
| 7 | Y1 | output | Channel 1 multiplexer output, forced Low when E is High; buffered output for high noise immunity. |
| 8 | GND | power_in | Ground reference for the device (0 V). |
| 9 | Y2 | output | Channel 2 multiplexer output, forced Low when E is High; buffered output for high noise immunity. |
| 10 | B2 | input | Channel 2 data input B, routed to Y2 when E is Low and S is High; inputs tolerate voltages up to 7 V. |
| 11 | A2 | input | Channel 2 data input A, routed to Y2 when E is Low and S is Low; inputs tolerate voltages up to 7 V. |
| 12 | Y3 | output | Channel 3 multiplexer output, forced Low when E is High; buffered output for high noise immunity. |
| 13 | B3 | input | Channel 3 data input B, routed to Y3 when E is Low and S is High; inputs tolerate voltages up to 7 V. |
| 14 | A3 | input | Channel 3 data input A, routed to Y3 when E is Low and S is Low; inputs tolerate voltages up to 7 V. |
| 15 | E | input | Active-high enable input; when held High, data selection is inhibited and all outputs go Low; inputs tolerate voltages up to 7 V. |
| 16 | VCC | power_in | Positive supply; recommended operating range 2.0 V to 5.5 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | SOIC-16 |
| Category | Logic |
| Pins | 16 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| DC Supply Voltage | VCC | 2 | 5.5 | V | 3 | ||
| DC Input Voltage | VIN | 0 | 5.5 | V | Note 6 | 3 | |
| DC Output Voltage | VOUT | 0 | V | max printed as VCC | 3 | ||
| Operating Temperature Range | TA | -55 | 125 | °C | all package types | 3 | |
| Input Rise or Fall Time | tr,tf | 0 | 100 | ns/V | VCC = 3.3 V ± 0.3 V | 3 | |
| Input Rise or Fall Time | tr,tf | 0 | 20 | ns/V | VCC = 5.0 V ± 0.5 V | 3 | |
| High-Level Input Voltage | VIH | 1.5 | V | VCC = 2.0 V; −55°C ≤ TA ≤ 125°C | 4 | ||
| Low-Level Input Voltage | VIL | 0.5 | V | VCC = 2.0 V; −55°C ≤ TA ≤ 125°C | 4 | ||
| High-Level Output Voltage | VOH | 1.9 | V | VIN = VIH or VIL; IOH = −50 mA (as printed); VCC = 2.0 V; −55°C ≤ TA ≤ 125°C | 4 | ||
| High-Level Output Voltage | VOH | 2.9 | V | VIN = VIH or VIL; IOH = −50 mA (as printed); VCC = 3.0 V; −55°C ≤ TA ≤ 125°C | 4 | ||
| High-Level Output Voltage | VOH | 4.4 | V | VIN = VIH or VIL; IOH = −50 mA (as printed); VCC = 4.5 V; −55°C ≤ TA ≤ 125°C | 4 | ||
| High-Level Output Voltage | VOH | 2.34 | V | VIN = VIH or VIL; IOH = −4 mA; VCC = 3.0 V; −55°C ≤ TA ≤ 125°C | 4 | ||
| High-Level Output Voltage | VOH | 3.66 | V | VIN = VIH or VIL; IOH = −8 mA; VCC = 4.5 V; −55°C ≤ TA ≤ 125°C | 4 | ||
| Low-Level Output Voltage | VOL | 0.1 | V | VIN = VIH or VIL; IOL = 50 mA (as printed); VCC = 2.0 V; −55°C ≤ TA ≤ 125°C | 4 | ||
| Low-Level Output Voltage | VOL | 0.52 | V | VIN = VIH or VIL; IOL = 4 mA (printed as IOH = 4 mA); VCC = 3.0 V; −55°C ≤ TA ≤ 125°C | 4 | ||
| Input Leakage Current | IIN | -1 | 1 | mA | VIN = 5.5 V or GND; VCC = 0 to 5.5 V; −55°C ≤ TA ≤ 125°C | 4 | |
| Quiescent Supply Current | ICC | 4 | mA | VIN = VCC or GND; VCC = 5.5 V; TA = 25°C | 4 | ||
| Quiescent Supply Current | ICC | 40 | mA | VIN = VCC or GND; VCC = 5.5 V; −55°C ≤ TA ≤ 125°C | 4 | ||
| Propagation Delay, A to B to Y | tPLH, tPHL | 1 | 11.5 | ns | VCC = 3.3 ± 0.3 V; CL = 15 pF; −55°C ≤ TA ≤ 125°C | 4 | |
| Propagation Delay, A to B to Y | tPLH, tPHL | 1 | 15 | ns | VCC = 3.3 ± 0.3 V; CL = 50 pF; −55°C ≤ TA ≤ 125°C | 4 | |
| Propagation Delay, A to B to Y | tPLH, tPHL | 1 | 7.5 | ns | VCC = 5.0 ± 0.5 V; CL = 15 pF; −55°C ≤ TA ≤ 125°C | 4 | |
| Propagation Delay, A to B to Y | tPLH, tPHL | 1 | 9.5 | ns | VCC = 5.0 ± 0.5 V; CL = 50 pF; −55°C ≤ TA ≤ 125°C | 4 | |
| Propagation Delay, S to Y | tPLH, tPHL | 1 | 15.5 | ns | VCC = 3.3 ± 0.3 V; CL = 15 pF; −55°C ≤ TA ≤ 125°C | 4 | |
| Propagation Delay, S to Y | tPLH, tPHL | 1 | 19 | ns | VCC = 3.3 ± 0.3 V; CL = 50 pF; −55°C ≤ TA ≤ 125°C | 4 | |
| Propagation Delay, S to Y | tPLH, tPHL | 1 | 9.5 | ns | VCC = 5.0 ± 0.5 V; CL = 15 pF; −55°C ≤ TA ≤ 125°C | 4 | |
| Propagation Delay, S to Y | tPLH, tPHL | 1 | 11.5 | ns | VCC = 5.0 ± 0.5 V; CL = 50 pF; −55°C ≤ TA ≤ 125°C | 4 | |
| Propagation Delay, E to Y | tPLH, tPHL | 1 | 16 | ns | VCC = 3.3 ± 0.3 V; CL = 15 pF; −55°C ≤ TA ≤ 125°C | 4 | |
| Propagation Delay, E to Y | tPLH, tPHL | 1 | 19.5 | ns | VCC = 3.3 ± 0.3 V; CL = 50 pF; −55°C ≤ TA ≤ 125°C | 4 | |
| Propagation Delay, E to Y | tPLH, tPHL | 1 | 10 | ns | VCC = 5.0 ± 0.5 V; CL = 15 pF; −55°C ≤ TA ≤ 125°C | 4 | |
| Propagation Delay, E to Y | tPLH, tPHL | 1 | 12 | ns | VCC = 5.0 ± 0.5 V; CL = 50 pF; −55°C ≤ TA ≤ 125°C | 4 | |
| Input Capacitance | CIN | 4 | 10 | pF | Typical @ 25°C, VCC = 5.0 V; max over −55°C ≤ TA ≤ 125°C | 4 | |
| Quiet Output Maximum Dynamic VOL | VOLP | 0.3 | 0.8 | V | Input tr = tf = 3.0 ns; CL = 50 pF; VCC = 5.0 V; TA = 25°C | 5 | |
| Quiet Output Minimum Dynamic VOL | VOLV | -0.3 | -0.8 | V | Input tr = tf = 3.0 ns; CL = 50 pF; VCC = 5.0 V; TA = 25°C | 5 | |
| Minimum High Level Dynamic Input Voltage | VIHD | 3.5 | V | Input tr = tf = 3.0 ns; CL = 50 pF; VCC = 5.0 V; TA = 25°C | 5 | ||
| Maximum Low Level Dynamic Input Voltage | VILD | 1.5 | V | Input tr = tf = 3.0 ns; CL = 50 pF; VCC = 5.0 V; TA = 25°C | 5 | ||
| DC Supply Voltage | VCC | -0.5 | 7 | V | 3 | ||
| DC Input Voltage | VI | -0.5 | V | max printed as VCC + 7.0 | 3 | ||
| DC Output Voltage | VO | -0.5 | V | max printed as VCC + 7.0 | 3 | ||
| DC Input Diode Current | IIK | -20 | mA | VI < GND | 3 | ||
| DC Output Diode Current | IOK | -20 | 20 | mA | VO < GND | 3 | |
| DC Output Sink Current | IO | -25 | 25 | mA | 3 | ||
| DC Supply Current per Supply Pin | ICC | -100 | 100 | mA | 3 | ||
| Storage Temperature Range | TSTG | -65 | 150 | °C | 3 | ||
| Lead Temperature | TL | 260 | °C | 1 mm from case for 10 seconds | 3 | ||
| Junction Temperature under Bias | TJ | 150 | °C | 3 | |||
| Power Dissipation in Still Air | PD | 250 | mW | at 85°C | 3 | ||
| Latch-Up Performance | ILatch-Up | -500 | 500 | mA | Above VCC and below GND at 85°C (Note 5) | 3 | |
| ESD Withstand Voltage, Human Body Model | VESD | 2000 | V | Human Body Model (Note 2); printed as >2000 | 3 | ||
| ESD Withstand Voltage, Machine Model | VESD | 200 | V | Machine Model (Note 3); printed as >200 | 3 | ||
| Chip Power Dissipation Capacitance | CPD | 20 | pF | Note 7 | 4 | ||
| Thermal Resistance, Junction-to-Ambient | θJA | 250 | °C/W | 3 |
CAD (KiCad official)
- Symbol:
MC74VHC157D - Footprint:
Package_SO:SOIC-16_3.9x9.9mm_P1.27mm - 3D model: SOIC-16 (KiCad packages3D, STEP)
- 3D model files:
mc74vhc157d-etched.step/mc74vhc157d-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mc74vhc157d.step/mc74vhc157d.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: onsemi datasheet (7 pp, sha256
77f567cd8d62d608, retrieved 2026-10-18, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).