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MC74VHC126DR2G

Public Made by Adom

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onsemi Buffers, Drivers, Receivers, Transceivers, SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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MC74VHC126DR2G

onsemi · Buffers, Drivers, Receivers, Transceivers · SOIC-14

MC74VHC126DR2G from onsemi, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OE1 input Active-high 3-state output enable for buffer 1; setting it Low places output Y1 in high impedance.
2 A1 input Data input of buffer 1; inputs tolerate voltages up to 7.0 V and have power-down protection.
3 Y1 tri_state Noninverting 3-state output of buffer 1; high impedance when OE1 is Low.
4 OE2 input Active-high 3-state output enable for buffer 2; setting it Low places output Y2 in high impedance.
5 A2 input Data input of buffer 2; inputs tolerate voltages up to 7.0 V and have power-down protection.
6 Y2 tri_state Noninverting 3-state output of buffer 2; high impedance when OE2 is Low.
7 GND power_in Ground pin; the recommended DC input and output voltage ranges are referenced to GND.
8 Y3 tri_state Noninverting 3-state output of buffer 3; high impedance when OE3 is Low.
9 A3 input Data input of buffer 3; inputs tolerate voltages up to 7.0 V and have power-down protection.
10 OE3 input Active-high 3-state output enable for buffer 3; setting it Low places output Y3 in high impedance.
11 Y4 tri_state Noninverting 3-state output of buffer 4; high impedance when OE4 is Low.
12 A4 input Data input of buffer 4; inputs tolerate voltages up to 7.0 V and have power-down protection.
13 OE4 input Active-high 3-state output enable for buffer 4; setting it Low places output Y4 in high impedance.
14 VCC power_in Positive supply pin; the device is designed for a 2.0 V to 5.5 V operating range.

Key specifications

Parameter Value
Manufacturer onsemi
Package SOIC-14
Category Logic
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
DC Supply Voltage VCC 2 5.5 V 3
DC Input Voltage Vin 0 5.5 V 3
DC Output Voltage Vout 0 V Upper limit printed as VCC 3
Operating Temperature, All Package Types TA -55 125 °C 3
Input Rise and Fall Time tr, tf 0 100 ns/V VCC = 3.3 V ±0.3 V 3
Input Rise and Fall Time tr, tf 0 20 ns/V VCC = 5.0 V ±0.5 V 3
DC Supply Voltage VCC -0.5 7 V 3
DC Input Voltage Vin -0.5 7 V 3
DC Output Voltage Vout -0.5 V Upper limit printed as VCC + 0.5 V 3
Input Diode Current IIK -20 mA 3
Output Diode Current IOK -20 20 mA 3
DC Output Current, per Pin Iout -25 25 mA 3
DC Supply Current, VCC and GND Pins ICC -50 50 mA 3
Power Dissipation in Still Air PD 500 mW SOIC packages 3
Storage Temperature Tstg -65 150 °C 3
Maximum Minimum High-Level Input Voltage VIH 1.5 V VCC = 2.0 V, TA = 25°C 4
Minimum High-Level Input Voltage VIH 2.1 V VCC = 3.0 V, TA = 25°C 4
Minimum High-Level Input Voltage VIH 3.15 V VCC = 4.5 V, TA = 25°C 4
Minimum High-Level Input Voltage VIH 3.85 V VCC = 5.5 V, TA = 25°C 4
Maximum Low-Level Input Voltage VIL 0.5 V VCC = 2.0 V, TA = 25°C 4
Maximum Low-Level Input Voltage VIL 0.9 V VCC = 3.0 V, TA = 25°C 4
Maximum Low-Level Input Voltage VIL 1.35 V VCC = 4.5 V, TA = 25°C 4
Maximum Low-Level Input Voltage VIL 1.65 V VCC = 5.5 V, TA = 25°C 4
Minimum High-Level Output Voltage VOH 1.9 V VIN = VIH or VIL; IOH = −50 µA; VCC = 2.0 V; TA = 25°C 4
Minimum High-Level Output Voltage VOH 2.9 V VIN = VIH or VIL; IOH = −50 µA; VCC = 3.0 V; TA = 25°C 4
Minimum High-Level Output Voltage VOH 4.4 V VIN = VIH or VIL; IOH = −50 µA; VCC = 4.5 V; TA = 25°C 4
Minimum High-Level Output Voltage VOH 2.58 V VIN = VIH or VIL; IOH = −4.0 mA; VCC = 3.0 V; TA = 25°C 4
Minimum High-Level Output Voltage VOH 3.94 V VIN = VIH or VIL; IOH = −8.0 mA; VCC = 4.5 V; TA = 25°C 4
Maximum Low-Level Output Voltage VOL 0.1 V VIN = VIH or VIL; IOL = 50 µA; VCC = 2.0 V; TA = 25°C 4
Maximum Low-Level Output Voltage VOL 0.36 V VIN = VIH or VIL; IOL = 4.0 mA; VCC = 3.0 V; TA = 25°C 4
Maximum 3-State Leakage Current IOZ -0.25 0.25 µA VIN = VIH or VIL; VOUT = VCC or GND; VCC = 5.5 V; TA = 25°C 4
Maximum Input Leakage Current IIN -0.1 0.1 µA VIN = 5.5 V or GND; VCC = 0 to 5.5 V; TA = 25°C 4
Maximum Quiescent Supply Current ICC 4 µA VIN = VCC or GND; VCC = 5.5 V; TA = 25°C 4
Maximum Propagation Delay, A to Y tPLH, tPHL 5.6 8.1 ns VCC = 3.3 ± 0.3 V; CL = 15 pF; TA = 25°C 5
Maximum Propagation Delay, A to Y tPLH, tPHL 8 11.5 ns VCC = 3.3 ± 0.3 V; CL = 50 pF; TA = 25°C 5
Maximum Propagation Delay, A to Y tPLH, tPHL 3.8 5.3 ns VCC = 5.0 ± 0.5 V; CL = 15 pF; TA = 25°C 5
Maximum Propagation Delay, A to Y tPLH, tPHL 5.5 7.5 ns VCC = 5.0 ± 0.5 V; CL = 50 pF; TA = 25°C 5
Maximum Output Enable Time, OE to Y tPZL, tPZH 5.4 7.9 ns VCC = 3.3 ± 0.3 V; CL = 15 pF; RL = 1.0 kΩ; TA = 25°C 5
Maximum Output Enable Time, OE to Y tPZL, tPZH 8 11.5 ns VCC = 3.3 ± 0.3 V; CL = 50 pF; RL = 1.0 kΩ; TA = 25°C 5
Maximum Output Enable Time, OE to Y tPZL, tPZH 3.6 5.1 ns VCC = 5.0 ± 0.5 V; CL = 15 pF; RL = 1.0 kΩ; TA = 25°C 5
Maximum Output Enable Time, OE to Y tPZL, tPZH 5.1 7.1 ns VCC = 5.0 ± 0.5 V; CL = 50 pF; RL = 1.0 kΩ; TA = 25°C 5
Maximum Output Disable Time, OE to Y tPLZ, tPHZ 9.5 13.2 ns VCC = 3.3 ± 0.3 V; CL = 50 pF; RL = 1.0 kΩ; TA = 25°C 5
Maximum Output Disable Time, OE to Y tPLZ, tPHZ 6.1 8.8 ns VCC = 5.0 ± 0.5 V; CL = 50 pF; RL = 1.0 kΩ; TA = 25°C 5
Output-to-Output Skew tOSLH, tOSHL 1.5 ns VCC = 3.3 ± 0.3 V; CL = 50 pF (Note 3) 5
Output-to-Output Skew tOSLH, tOSHL 1 ns VCC = 5.0 ± 0.5 V; CL = 50 pF (Note 3) 5
Maximum Input Capacitance Cin 4 10 pF 5
Maximum Three-State Output Capacitance Cout 6 pF Output in high-impedance state 5
Quiet Output Maximum Dynamic VOL VOLP 0.3 0.8 V TA = 25°C; tr = tf = 3.0 ns; CL = 50 pF; VCC = 5.0 V 5
Quiet Output Minimum Dynamic VOL VOLV -0.3 -0.8 V TA = 25°C; tr = tf = 3.0 ns; CL = 50 pF; VCC = 5.0 V 5
Minimum High-Level Dynamic Input Voltage VIHD 3.5 V TA = 25°C; tr = tf = 3.0 ns; CL = 50 pF; VCC = 5.0 V 5
Maximum Low-Level Dynamic Input Voltage VILD 1.5 V TA = 25°C; tr = tf = 3.0 ns; CL = 50 pF; VCC = 5.0 V 5
Power Dissipation Capacitance CPD 15 pF Typical at 25°C, VCC = 5.0 V 5
Power Dissipation Derating, SOIC Packages -7 mW/°C From 65°C to 125°C 3

CAD (KiCad official)

  • Symbol: MC74VHC126DR2G
  • Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
  • 3D model: SOIC-14 (KiCad packages3D, STEP)
  • 3D model files: mc74vhc126dr2g-etched.step / mc74vhc126dr2g-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mc74vhc126dr2g.step / mc74vhc126dr2g.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (11 pp, sha256 a3143bc88bb0725b, retrieved 2026-10-18, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF