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MC74VHC125DR2G

Public Made by Adom

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onsemi Buffers, Drivers, Receivers, Transceivers, SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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MC74VHC125DR2G

onsemi · Buffers, Drivers, Receivers, Transceivers · SOIC-14

MC74VHC125DR2G from onsemi, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OE1 input Active-low 3-state output enable for buffer 1; setting it High places output Y1 in the high-impedance state.
2 A1 input Data input of buffer 1, which tolerates voltages up to 7 V and must be tied to GND or VCC if unused.
3 Y1 tri_state 3-state output of buffer 1, rated at a DC output current of ±25 mA per pin and high-impedance when OE1 is High.
4 OE2 input Active-low 3-state output enable for buffer 2; setting it High places output Y2 in the high-impedance state.
5 A2 input Data input of buffer 2, which tolerates voltages up to 7 V and must be tied to GND or VCC if unused.
6 Y2 tri_state 3-state output of buffer 2, rated at a DC output current of ±25 mA per pin and high-impedance when OE2 is High.
7 GND power_in Ground reference pin for the device.
8 Y3 tri_state 3-state output of buffer 3, rated at a DC output current of ±25 mA per pin and high-impedance when OE3 is High.
9 A3 input Data input of buffer 3, which tolerates voltages up to 7 V and must be tied to GND or VCC if unused.
10 OE3 input Active-low 3-state output enable for buffer 3; setting it High places output Y3 in the high-impedance state.
11 Y4 tri_state 3-state output of buffer 4, rated at a DC output current of ±25 mA per pin and high-impedance when OE4 is High.
12 A4 input Data input of buffer 4, which tolerates voltages up to 7 V and must be tied to GND or VCC if unused.
13 OE4 input Active-low 3-state output enable for buffer 4; setting it High places output Y4 in the high-impedance state.
14 VCC power_in Positive supply pin; the device is designed for a 2.0 V to 5.5 V operating range.

Key specifications

Parameter Value
Manufacturer onsemi
Package SOIC-14
Category Logic
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Minimum High-Level Input Voltage, VCC = 2.0 V VIH 1.5 V VCC = 2.0 V; TA <= 125 C 3
Minimum High-Level Input Voltage, VCC = 3.0 V VIH 2.1 V VCC = 3.0 V; TA <= 125 C 3
Minimum High-Level Input Voltage, VCC = 4.5 V VIH 3.15 V VCC = 4.5 V; TA <= 125 C 3
Minimum High-Level Input Voltage, VCC = 5.5 V VIH 3.85 V VCC = 5.5 V; TA <= 125 C 3
Maximum Low-Level Input Voltage, VCC = 2.0 V VIL 0.5 V VCC = 2.0 V; TA <= 125 C 3
Maximum Low-Level Input Voltage, VCC = 3.0 V VIL 0.9 V VCC = 3.0 V; TA <= 125 C 3
Maximum Low-Level Input Voltage, VCC = 4.5 V VIL 1.35 V VCC = 4.5 V; TA <= 125 C 3
Maximum Low-Level Input Voltage, VCC = 5.5 V VIL 1.65 V VCC = 5.5 V; TA <= 125 C 3
Minimum High-Level Output Voltage, VCC = 2.0 V VOH 1.9 V VIN = VIH or VIL; IOH = -50 uA; VCC = 2.0 V; TA <= 125 C 3
Minimum High-Level Output Voltage, VCC = 3.0 V VOH 2.9 V VIN = VIH or VIL; IOH = -50 uA; VCC = 3.0 V; TA <= 125 C 3
Minimum High-Level Output Voltage, VCC = 4.5 V VOH 4.4 V VIN = VIH or VIL; IOH = -50 uA; VCC = 4.5 V; TA <= 125 C 3
Minimum High-Level Output Voltage, VCC = 3.0 V, IOH = -4 mA VOH 2.34 V VIN = VIH or VIL; IOH = -4 mA; VCC = 3.0 V; TA <= 125 C 3
Minimum High-Level Output Voltage, VCC = 4.5 V, IOH = -8 mA VOH 3.66 V VIN = VIH or VIL; IOH = -8 mA; VCC = 4.5 V; TA <= 125 C 3
Maximum Low-Level Output Voltage, VCC = 2.0 V VOL 0.1 V VIN = VIH or VIL; IOL = 50 uA; VCC = 2.0 V; TA <= 125 C 3
Maximum Low-Level Output Voltage, VCC = 3.0 V VOL 0.1 V VIN = VIH or VIL; IOL = 50 uA; VCC = 3.0 V; TA <= 125 C 3
Maximum Low-Level Output Voltage, VCC = 4.5 V VOL 0.1 V VIN = VIH or VIL; IOL = 50 uA; VCC = 4.5 V; TA <= 125 C 3
Maximum Low-Level Output Voltage, VCC = 3.0 V, IOL = 4 mA VOL 0.52 V VIN = VIH or VIL; IOL = 4 mA; VCC = 3.0 V; TA <= 125 C 3
Maximum Low-Level Output Voltage, VCC = 4.5 V, IOL = 8 mA VOL 0.52 V VIN = VIH or VIL; IOL = 8 mA; VCC = 4.5 V; TA <= 125 C 3
Maximum 3-State Leakage Current IOZ 2.5 uA VCC = 5.5 V; VIN = VIH or VIL; VOUT = VCC or GND; TA <= 125 C 3
Maximum Input Leakage Current IIN 1 uA VIN = 5.5 V or GND; VCC = 0 to 5.5 V; TA <= 125 C 3
Maximum Quiescent Supply Current ICC 40 uA VIN = VCC or GND; VCC = 5.5 V; TA <= 125 C 3
Maximum Propagation Delay, A to Y, VCC = 3.3 V, CL = 15 pF tPLH, tPHL 1 12 ns VCC = 3.3 +/- 0.3 V; CL = 15 pF; TA <= 125 C; input tr = tf = 3.0 ns 4
Maximum Propagation Delay, A to Y, VCC = 3.3 V, CL = 50 pF tPLH, tPHL 1 16 ns VCC = 3.3 +/- 0.3 V; CL = 50 pF; TA <= 125 C; input tr = tf = 3.0 ns 4
Maximum Propagation Delay, A to Y, VCC = 5.0 V, CL = 15 pF tPLH, tPHL 1 10.5 ns VCC = 5.0 +/- 0.5 V; CL = 15 pF; TA <= 125 C; input tr = tf = 3.0 ns 4
Maximum Propagation Delay, A to Y, VCC = 5.0 V, CL = 50 pF tPLH, tPHL 1 10.5 ns VCC = 5.0 +/- 0.5 V; CL = 50 pF; TA <= 125 C; input tr = tf = 3.0 ns 4
Maximum Output Enable Time, OE to Y, VCC = 3.3 V, CL = 15 pF tPZL, tPZH 1 11.5 ns VCC = 3.3 +/- 0.3 V; CL = 15 pF; RL = 1 k; TA <= 125 C; input tr = tf = 3.0 ns 4
Maximum Output Enable Time, OE to Y, VCC = 3.3 V, CL = 50 pF tPZL, tPZH 1 15 ns VCC = 3.3 +/- 0.3 V; CL = 50 pF; RL = 1 k; TA <= 125 C; input tr = tf = 3.0 ns 4
Maximum Output Enable Time, OE to Y, VCC = 5.0 V, CL = 15 pF tPZL, tPZH 1 7.5 ns VCC = 5.0 +/- 0.5 V; CL = 15 pF; RL = 1 k; TA <= 125 C; input tr = tf = 3.0 ns 4
Maximum Output Enable Time, OE to Y, VCC = 5.0 V, CL = 50 pF tPZL, tPZH 1 9.5 ns VCC = 5.0 +/- 0.5 V; CL = 50 pF; RL = 1 k; TA <= 125 C; input tr = tf = 3.0 ns 4
Maximum Output Disable Time, OE to Y, VCC = 3.3 V tPLZ, tPHZ 1 18 ns VCC = 3.3 +/- 0.3 V; CL = 50 pF; RL = 1 k; TA <= 125 C; input tr = tf = 3.0 ns 4
Maximum Output Disable Time, OE to Y, VCC = 5.0 V tPLZ, tPHZ 1 12 ns VCC = 5.0 +/- 0.5 V; CL = 50 pF; RL = 1 k; TA <= 125 C; input tr = tf = 3.0 ns 4
Output-to-Output Skew, VCC = 3.3 V tOSLH, tOSHL 1.5 ns VCC = 3.3 +/- 0.3 V; CL = 50 pF; TA <= 125 C (Note 1, parameter guaranteed by design) 4
Output-to-Output Skew, VCC = 5.0 V tOSLH, tOSHL 1 ns VCC = 5.0 +/- 0.5 V; CL = 50 pF; TA <= 125 C (Note 1, parameter guaranteed by design) 4
Maximum Input Capacitance Cin 10 pF 4
Maximum Three-State Output Capacitance (output in high impedance state) Cout 6 pF Output in high impedance state 4
Quiet Output Maximum Dynamic VOL VOLP 0.3 0.8 V Input tr = tf = 3.0 ns; CL = 50 pF; VCC = 5.0 V; TA = 25 C 4
Quiet Output Minimum Dynamic VOL VOLV -0.3 -0.8 V Input tr = tf = 3.0 ns; CL = 50 pF; VCC = 5.0 V; TA = 25 C 4
Minimum High-Level Dynamic Input Voltage VIHD 3.5 V Input tr = tf = 3.0 ns; CL = 50 pF; VCC = 5.0 V; TA = 25 C 4
Maximum Low-Level Dynamic Input Voltage VILD 1.5 V Input tr = tf = 3.0 ns; CL = 50 pF; VCC = 5.0 V; TA = 25 C 4
DC Supply Voltage VCC 2 5.5 V 2
DC Input Voltage Vin 0 5.5 V 2
DC Output Voltage Vout 0 V Max = VCC 2
Operating Temperature, All Package Types TA -55 125 C 2
Input Rise and Fall Time, VCC = 3.3 V +/- 0.3 V tr, tf 0 100 ns/V VCC = 3.3 +/- 0.3 V 2
Input Rise and Fall Time, VCC = 5.0 V +/- 0.5 V tr, tf 0 20 ns/V VCC = 5.0 +/- 0.5 V 2
DC Supply Voltage (absolute maximum) VCC -0.5 7 V 2
DC Input Voltage (absolute maximum) Vin -0.5 7 V 2
DC Output Voltage (absolute maximum, -0.5 to VCC +0.5) Vout -0.5 V Upper bound is VCC + 0.5 V 2
Input Diode Current IIK -20 mA 2
Output Diode Current IOK -20 20 mA 2
DC Output Current, per Pin Iout -25 25 mA 2
DC Supply Current, VCC and GND Pins ICC -50 50 mA 2
Power Dissipation in Still Air, SOIC Package PD 500 mW SOIC package, still air 2
Storage Temperature Tstg -65 150 C 2
Power Dissipation Derating, SOIC Package -7 mW/C Derating from 65 C to 125 C 2

CAD (KiCad official)

  • Symbol: MC74VHC125DR2G
  • Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
  • 3D model: SOIC-14 (KiCad packages3D, STEP)
  • 3D model files: mc74vhc125dr2g-etched.step / mc74vhc125dr2g-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mc74vhc125dr2g.step / mc74vhc125dr2g.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (10 pp, sha256 136c05a4a643d6f4, retrieved 2026-10-18, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF