component
MC74VHC00DR2G
Public Made by Adomby adom
onsemi Gates, SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
MC74VHC00DR2G
onsemi · Gates · SOIC-14
MC74VHC00DR2G from onsemi, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A1 | input | Gate 1 input A; inputs tolerate up to 5.5 V and unused inputs must be tied to GND or VCC. |
| 2 | B1 | input | Gate 1 input B; inputs tolerate up to 5.5 V and unused inputs must be tied to GND or VCC. |
| 3 | Y1 | output | Gate 1 NAND output (Y = AB inverted), rated for ±25 mA per pin; unused outputs must be left open. |
| 4 | A2 | input | Gate 2 input A; inputs tolerate up to 5.5 V and unused inputs must be tied to GND or VCC. |
| 5 | B2 | input | Gate 2 input B; inputs tolerate up to 5.5 V and unused inputs must be tied to GND or VCC. |
| 6 | Y2 | output | Gate 2 NAND output, rated for ±25 mA per pin; unused outputs must be left open. |
| 7 | GND | power_in | Ground pin (0 V reference). |
| 8 | Y3 | output | Gate 3 NAND output, rated for ±25 mA per pin; unused outputs must be left open. |
| 9 | A3 | input | Gate 3 input A; inputs tolerate up to 5.5 V and unused inputs must be tied to GND or VCC. |
| 10 | B3 | input | Gate 3 input B; inputs tolerate up to 5.5 V and unused inputs must be tied to GND or VCC. |
| 11 | Y4 | output | Gate 4 NAND output, rated for ±25 mA per pin; unused outputs must be left open. |
| 12 | A4 | input | Gate 4 input A; inputs tolerate up to 5.5 V and unused inputs must be tied to GND or VCC. |
| 13 | B4 | input | Gate 4 input B; inputs tolerate up to 5.5 V and unused inputs must be tied to GND or VCC. |
| 14 | VCC | power_in | Positive supply, recommended 2.0 V to 5.5 V for MC74VHC00 (absolute maximum -0.5 to +6.5 V). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | SOIC-14 |
| Category | Logic ICs |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| DC Supply Voltage (max rating) | VCC | -0.5 | 6.5 | V | 2 | ||
| DC Input Voltage (max rating) | VIN | -0.5 | 6.5 | V | 2 | ||
| DC Output Voltage (MC74VHC) max rating | VOUT | -0.5 | 6.5 | V | -0.5 to VCC + 0.5 V (upper limit printed as VCC + 0.5) | 2 | |
| DC Input Current per Pin | IIN | -20 | 20 | mA | 2 | ||
| DC Output Current per Pin | IOUT | -25 | 25 | mA | 2 | ||
| DC Supply Current, VCC and GND Pins | ICC | -50 | 50 | mA | 2 | ||
| Input Clamp Current | IIK | -20 | mA | 2 | |||
| Output Clamp Current MC74VHC | IOK | -20 | 20 | mA | MC74VHC | 2 | |
| Storage Temperature Range | TSTG | -65 | 150 | °C | 2 | ||
| Lead Temperature | TL | 260 | °C | 1 mm from case for 10 seconds | 2 | ||
| Junction Temperature Under Bias | TJ | -150 | 150 | °C | printed ±150 | 2 | |
| Thermal Resistance | θJA | 116 | °C/W | SOIC-14 NB; value printed as 116 | 2 | ||
| Power Dissipation in Still Air | PD | 1077 | mW | SOIC-14 NB, 25 °C | 2 | ||
| DC Supply Voltage | VCC | 2 | 5.5 | V | MC74VHC | 3 | |
| DC Input Voltage | VIN | 0 | 5.5 | V | MC74VHC | 3 | |
| DC Output Voltage | VOUT | 0 | V | MC74VHC; max printed as VCC | 3 | ||
| Operating Temperature Range | TA | -55 | 125 | °C | MC74VHC | 3 | |
| Input Rise or Fall Time | tr, tf | 0 | 100 | ns/V | VCC = 3.0 V to 3.6 V | 3 | |
| Input Rise or Fall Time | tr, tf | 0 | 20 | ns/V | VCC = 4.5 V to 5.5 V | 3 | |
| High-Level Input Voltage | VIH | 1.5 | V | VCC = 2.0 V, TA = 25 °C and -55 to 125 °C | 4 | ||
| Low-Level Input Voltage | VIL | 0.5 | V | VCC = 2.0 V, TA = 25 °C and -55 to 125 °C | 4 | ||
| High-Level Output Voltage | VOH | 1.9 | 2 | V | Vin = VIH or VIL, IOH = -50 µA, VCC = 2.0 V, TA = 25 °C | 4 | |
| High-Level Output Voltage | VOH | 2.9 | 3 | V | Vin = VIH or VIL, IOH = -50 µA, VCC = 3.0 V, TA = 25 °C | 4 | |
| High-Level Output Voltage | VOH | 4.4 | 4.5 | V | Vin = VIH or VIL, IOH = -50 µA, VCC = 4.5 V, TA = 25 °C | 4 | |
| High-Level Output Voltage | VOH | 2.58 | V | Vin = VIH or VIL, IOH = -4.0 mA, VCC = 3.0 V, TA = 25 °C | 4 | ||
| High-Level Output Voltage | VOH | 3.94 | V | Vin = VIH or VIL, IOH = -8.0 mA, VCC = 4.5 V, TA = 25 °C | 4 | ||
| High-Level Output Voltage | VOH | 2.48 | V | Vin = VIH or VIL, IOH = -4.0 mA, VCC = 3.0 V, TA = -55 °C to 125 °C | 4 | ||
| High-Level Output Voltage | VOH | 3.8 | V | Vin = VIH or VIL, IOH = -8.0 mA, VCC = 4.5 V, TA = -55 °C to 125 °C | 4 | ||
| Low-Level Output Voltage | VOL | 0 | 0.1 | V | Vin = VIH or VIL, IOL = 50 µA, VCC = 2.0/3.0/4.5 V, TA = 25 °C | 4 | |
| Low-Level Output Voltage | VOL | 0.36 | V | Vin = VIH or VIL, IOL = 4.0 mA (3.0 V) / 8.0 mA (4.5 V), TA = 25 °C | 4 | ||
| Low-Level Output Voltage | VOL | 0.44 | V | Vin = VIH or VIL, IOL = 4.0 mA (3.0 V) / 8.0 mA (4.5 V), TA = -55 °C to 125 °C | 4 | ||
| Low-Level Output Voltage | VOL | 0.1 | V | Vin = VIH or VIL, IOL = 50 µA, VCC = 2.0/3.0/4.5 V, TA = -55 °C to 125 °C | 4 | ||
| Input Leakage Current | Iin | -0.1 | 0.1 | µA | Vin = 5.5 V or GND, VCC = 0 to 5.5 V, TA = 25 °C | 4 | |
| Input Leakage Current | Iin | -1 | 1 | µA | Vin = 5.5 V or GND, VCC = 0 to 5.5 V, TA = -55 °C to 125 °C | 4 | |
| Quiescent Supply Current | ICC | 2 | 20 | µA | Vin = VCC or GND, VCC = 5.5 V; typ and max at 25 °C is typ 2.0; max 20.0 is -55 to 125 °C | 4 | |
| Propagation Delay A or B to Y | tPLH, tPHL | 5.5 | 8 | ns | CL = 15 pF, VCC = 3.0-3.6 V, TA = 25 °C | 4 | |
| Propagation Delay A or B to Y | tPLH, tPHL | 7.9 | 11.4 | ns | CL = 50 pF, VCC = 3.0-3.6 V, TA = 25 °C | 4 | |
| Propagation Delay A or B to Y | tPLH, tPHL | 3.7 | 5.5 | ns | CL = 15 pF, VCC = 4.5-5.5 V, TA = 25 °C | 4 | |
| Propagation Delay A or B to Y | tPLH, tPHL | 5.2 | 7.5 | ns | CL = 50 pF, VCC = 4.5-5.5 V, TA = 25 °C | 4 | |
| Propagation Delay A or B to Y | tPLH, tPHL | 1 | 9.5 | ns | CL = 15 pF, VCC = 3.0-3.6 V, TA = 85 °C | 4 | |
| Propagation Delay A or B to Y | tPLH, tPHL | 1 | 13 | ns | CL = 50 pF, VCC = 3.0-3.6 V, TA = 85 °C | 4 | |
| Propagation Delay A or B to Y | tPLH, tPHL | 1 | 10 | ns | CL = 15 pF, VCC = 3.0-3.6 V, TA = 125 °C | 4 | |
| Propagation Delay A or B to Y | tPLH, tPHL | 1 | 14.5 | ns | CL = 50 pF, VCC = 3.0-3.6 V, TA = 125 °C | 4 | |
| Propagation Delay A or B to Y | tPLH, tPHL | 1 | 6.5 | ns | CL = 15 pF, VCC = 4.5-5.5 V, TA = 85 °C | 4 | |
| Propagation Delay A or B to Y | tPLH, tPHL | 1 | 8.5 | ns | CL = 50 pF, VCC = 4.5-5.5 V, TA = 85 °C | 4 | |
| Propagation Delay A or B to Y | tPLH, tPHL | 1 | 7 | ns | CL = 15 pF, VCC = 4.5-5.5 V, TA = 125 °C | 4 | |
| Input Capacitance | Cin | 4 | 10 | pF | TA = 25 °C, 85 °C and 125 °C max 10 | 4 | |
| Power Dissipation Capacitance | CPD | 19 | pF | VCC = 5.0 V, typical @ 25 °C | 4 | ||
| Quiet Output Maximum Dynamic VOL | VOLP | 0.3 | 0.8 | V | VCC = 5.0 V, tR = tF = 3.0 ns, CL = 50 pF, TA = 25 °C | 4 | |
| Quiet Output Minimum Dynamic VOL | VOLV | -0.8 | -0.3 | V | VCC = 5.0 V, tR = tF = 3.0 ns, CL = 50 pF, TA = 25 °C | 4 | |
| Minimum High Level Dynamic Input Voltage | VIHD | 3.5 | V | VCC = 5.0 V, tR = tF = 3.0 ns, CL = 50 pF, TA = 25 °C | 4 | ||
| Maximum Low Level Dynamic Input Voltage | VILD | 1.5 | V | VCC = 5.0 V, tR = tF = 3.0 ns, CL = 50 pF, TA = 25 °C | 4 |
CAD (KiCad official)
- Symbol:
MC74VHC00DR2G - Footprint:
Package_SO:SOIC-14_3.9x8.7mm_P1.27mm - 3D model: SOIC-14 (KiCad packages3D, STEP)
- 3D model files:
mc74vhc00dr2g-etched.step/mc74vhc00dr2g-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mc74vhc00dr2g.step/mc74vhc00dr2g.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: onsemi datasheet (12 pp, sha256
05a97fbfc5c21d00, retrieved 2026-10-27, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# MC74VHC00DR2G
**onsemi** · Gates · SOIC-14
MC74VHC00DR2G from onsemi, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A1 | input | Gate 1 input A; inputs tolerate up to 5.5 V and unused inputs must be tied to GND or VCC. |
| 2 | B1 | input | Gate 1 input B; inputs tolerate up to 5.5 V and unused inputs must be tied to GND or VCC. |
| 3 | Y1 | output | Gate 1 NAND output (Y = AB inverted), rated for ±25 mA per pin; unused outputs must be left open. |
| 4 | A2 | input | Gate 2 input A; inputs tolerate up to 5.5 V and unused inputs must be tied to GND or VCC. |
| 5 | B2 | input | Gate 2 input B; inputs tolerate up to 5.5 V and unused inputs must be tied to GND or VCC. |
| 6 | Y2 | output | Gate 2 NAND output, rated for ±25 mA per pin; unused outputs must be left open. |
| 7 | GND | power_in | Ground pin (0 V reference). |
| 8 | Y3 | output | Gate 3 NAND output, rated for ±25 mA per pin; unused outputs must be left open. |
| 9 | A3 | input | Gate 3 input A; inputs tolerate up to 5.5 V and unused inputs must be tied to GND or VCC. |
| 10 | B3 | input | Gate 3 input B; inputs tolerate up to 5.5 V and unused inputs must be tied to GND or VCC. |
| 11 | Y4 | output | Gate 4 NAND output, rated for ±25 mA per pin; unused outputs must be left open. |
| 12 | A4 | input | Gate 4 input A; inputs tolerate up to 5.5 V and unused inputs must be tied to GND or VCC. |
| 13 | B4 | input | Gate 4 input B; inputs tolerate up to 5.5 V and unused inputs must be tied to GND or VCC. |
| 14 | VCC | power_in | Positive supply, recommended 2.0 V to 5.5 V for MC74VHC00 (absolute maximum -0.5 to +6.5 V). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | SOIC-14 |
| Category | Logic ICs |
| Pins | 14 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| DC Supply Voltage (max rating) | VCC | -0.5 | | 6.5 | V | | 2 |
| DC Input Voltage (max rating) | VIN | -0.5 | | 6.5 | V | | 2 |
| DC Output Voltage (MC74VHC) max rating | VOUT | -0.5 | | 6.5 | V | -0.5 to VCC + 0.5 V (upper limit printed as VCC + 0.5) | 2 |
| DC Input Current per Pin | IIN | -20 | | 20 | mA | | 2 |
| DC Output Current per Pin | IOUT | -25 | | 25 | mA | | 2 |
| DC Supply Current, VCC and GND Pins | ICC | -50 | | 50 | mA | | 2 |
| Input Clamp Current | IIK | -20 | | | mA | | 2 |
| Output Clamp Current MC74VHC | IOK | -20 | | 20 | mA | MC74VHC | 2 |
| Storage Temperature Range | TSTG | -65 | | 150 | °C | | 2 |
| Lead Temperature | TL | | | 260 | °C | 1 mm from case for 10 seconds | 2 |
| Junction Temperature Under Bias | TJ | -150 | | 150 | °C | printed ±150 | 2 |
| Thermal Resistance | θJA | | | 116 | °C/W | SOIC-14 NB; value printed as 116 | 2 |
| Power Dissipation in Still Air | PD | | | 1077 | mW | SOIC-14 NB, 25 °C | 2 |
| DC Supply Voltage | VCC | 2 | | 5.5 | V | MC74VHC | 3 |
| DC Input Voltage | VIN | 0 | | 5.5 | V | MC74VHC | 3 |
| DC Output Voltage | VOUT | 0 | | | V | MC74VHC; max printed as VCC | 3 |
| Operating Temperature Range | TA | -55 | | 125 | °C | MC74VHC | 3 |
| Input Rise or Fall Time | tr, tf | 0 | | 100 | ns/V | VCC = 3.0 V to 3.6 V | 3 |
| Input Rise or Fall Time | tr, tf | 0 | | 20 | ns/V | VCC = 4.5 V to 5.5 V | 3 |
| High-Level Input Voltage | VIH | 1.5 | | | V | VCC = 2.0 V, TA = 25 °C and -55 to 125 °C | 4 |
| Low-Level Input Voltage | VIL | | | 0.5 | V | VCC = 2.0 V, TA = 25 °C and -55 to 125 °C | 4 |
| High-Level Output Voltage | VOH | 1.9 | 2 | | V | Vin = VIH or VIL, IOH = -50 µA, VCC = 2.0 V, TA = 25 °C | 4 |
| High-Level Output Voltage | VOH | 2.9 | 3 | | V | Vin = VIH or VIL, IOH = -50 µA, VCC = 3.0 V, TA = 25 °C | 4 |
| High-Level Output Voltage | VOH | 4.4 | 4.5 | | V | Vin = VIH or VIL, IOH = -50 µA, VCC = 4.5 V, TA = 25 °C | 4 |
| High-Level Output Voltage | VOH | 2.58 | | | V | Vin = VIH or VIL, IOH = -4.0 mA, VCC = 3.0 V, TA = 25 °C | 4 |
| High-Level Output Voltage | VOH | 3.94 | | | V | Vin = VIH or VIL, IOH = -8.0 mA, VCC = 4.5 V, TA = 25 °C | 4 |
| High-Level Output Voltage | VOH | 2.48 | | | V | Vin = VIH or VIL, IOH = -4.0 mA, VCC = 3.0 V, TA = -55 °C to 125 °C | 4 |
| High-Level Output Voltage | VOH | 3.8 | | | V | Vin = VIH or VIL, IOH = -8.0 mA, VCC = 4.5 V, TA = -55 °C to 125 °C | 4 |
| Low-Level Output Voltage | VOL | | 0 | 0.1 | V | Vin = VIH or VIL, IOL = 50 µA, VCC = 2.0/3.0/4.5 V, TA = 25 °C | 4 |
| Low-Level Output Voltage | VOL | | | 0.36 | V | Vin = VIH or VIL, IOL = 4.0 mA (3.0 V) / 8.0 mA (4.5 V), TA = 25 °C | 4 |
| Low-Level Output Voltage | VOL | | | 0.44 | V | Vin = VIH or VIL, IOL = 4.0 mA (3.0 V) / 8.0 mA (4.5 V), TA = -55 °C to 125 °C | 4 |
| Low-Level Output Voltage | VOL | | | 0.1 | V | Vin = VIH or VIL, IOL = 50 µA, VCC = 2.0/3.0/4.5 V, TA = -55 °C to 125 °C | 4 |
| Input Leakage Current | Iin | -0.1 | | 0.1 | µA | Vin = 5.5 V or GND, VCC = 0 to 5.5 V, TA = 25 °C | 4 |
| Input Leakage Current | Iin | -1 | | 1 | µA | Vin = 5.5 V or GND, VCC = 0 to 5.5 V, TA = -55 °C to 125 °C | 4 |
| Quiescent Supply Current | ICC | | 2 | 20 | µA | Vin = VCC or GND, VCC = 5.5 V; typ and max at 25 °C is typ 2.0; max 20.0 is -55 to 125 °C | 4 |
| Propagation Delay A or B to Y | tPLH, tPHL | | 5.5 | 8 | ns | CL = 15 pF, VCC = 3.0-3.6 V, TA = 25 °C | 4 |
| Propagation Delay A or B to Y | tPLH, tPHL | | 7.9 | 11.4 | ns | CL = 50 pF, VCC = 3.0-3.6 V, TA = 25 °C | 4 |
| Propagation Delay A or B to Y | tPLH, tPHL | | 3.7 | 5.5 | ns | CL = 15 pF, VCC = 4.5-5.5 V, TA = 25 °C | 4 |
| Propagation Delay A or B to Y | tPLH, tPHL | | 5.2 | 7.5 | ns | CL = 50 pF, VCC = 4.5-5.5 V, TA = 25 °C | 4 |
| Propagation Delay A or B to Y | tPLH, tPHL | 1 | | 9.5 | ns | CL = 15 pF, VCC = 3.0-3.6 V, TA = 85 °C | 4 |
| Propagation Delay A or B to Y | tPLH, tPHL | 1 | | 13 | ns | CL = 50 pF, VCC = 3.0-3.6 V, TA = 85 °C | 4 |
| Propagation Delay A or B to Y | tPLH, tPHL | 1 | | 10 | ns | CL = 15 pF, VCC = 3.0-3.6 V, TA = 125 °C | 4 |
| Propagation Delay A or B to Y | tPLH, tPHL | 1 | | 14.5 | ns | CL = 50 pF, VCC = 3.0-3.6 V, TA = 125 °C | 4 |
| Propagation Delay A or B to Y | tPLH, tPHL | 1 | | 6.5 | ns | CL = 15 pF, VCC = 4.5-5.5 V, TA = 85 °C | 4 |
| Propagation Delay A or B to Y | tPLH, tPHL | 1 | | 8.5 | ns | CL = 50 pF, VCC = 4.5-5.5 V, TA = 85 °C | 4 |
| Propagation Delay A or B to Y | tPLH, tPHL | 1 | | 7 | ns | CL = 15 pF, VCC = 4.5-5.5 V, TA = 125 °C | 4 |
| Input Capacitance | Cin | | 4 | 10 | pF | TA = 25 °C, 85 °C and 125 °C max 10 | 4 |
| Power Dissipation Capacitance | CPD | | 19 | | pF | VCC = 5.0 V, typical @ 25 °C | 4 |
| Quiet Output Maximum Dynamic VOL | VOLP | | 0.3 | 0.8 | V | VCC = 5.0 V, tR = tF = 3.0 ns, CL = 50 pF, TA = 25 °C | 4 |
| Quiet Output Minimum Dynamic VOL | VOLV | -0.8 | -0.3 | | V | VCC = 5.0 V, tR = tF = 3.0 ns, CL = 50 pF, TA = 25 °C | 4 |
| Minimum High Level Dynamic Input Voltage | VIHD | 3.5 | | | V | VCC = 5.0 V, tR = tF = 3.0 ns, CL = 50 pF, TA = 25 °C | 4 |
| Maximum Low Level Dynamic Input Voltage | VILD | | | 1.5 | V | VCC = 5.0 V, tR = tF = 3.0 ns, CL = 50 pF, TA = 25 °C | 4 |
## CAD (KiCad official)
- Symbol: `MC74VHC00DR2G`
- Footprint: `Package_SO:SOIC-14_3.9x8.7mm_P1.27mm`
- 3D model: SOIC-14 (KiCad packages3D, STEP)
- 3D model files: `mc74vhc00dr2g-etched.step` / `mc74vhc00dr2g-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `mc74vhc00dr2g.step` / `mc74vhc00dr2g.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [onsemi datasheet](https://www.onsemi.com/pdf/datasheet/mc74vhc00-d.pdf) (12 pp, sha256 `05a97fbfc5c21d00`, retrieved 2026-10-27, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/mc74vhc00dr2g-datasheet.pdf)