# MC74LCX541DWR2G

**onsemi** · Buffers / Drivers · SOIC-20-300mil

MC74LCX541DWR2G from onsemi, in a SOIC-20-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OE1 | input | Output Enable input 1; when HIGH, places the outputs in the high-impedance state (5.5 V tolerant input). |
| 2 | D0 | input | Data input 0, 5 V tolerant (VI up to 5.5 V); drives output O0. |
| 3 | D1 | input | Data input 1, 5 V tolerant (VI up to 5.5 V); drives output O1. |
| 4 | D2 | input | Data input 2, 5 V tolerant (VI up to 5.5 V); drives output O2. |
| 5 | D3 | input | Data input 3, 5 V tolerant (VI up to 5.5 V); drives output O3. |
| 6 | D4 | input | Data input 4, 5 V tolerant (VI up to 5.5 V); drives output O4. |
| 7 | D5 | input | Data input 5, 5 V tolerant (VI up to 5.5 V); drives output O5. |
| 8 | D6 | input | Data input 6, 5 V tolerant (VI up to 5.5 V); drives output O6. |
| 9 | D7 | input | Data input 7, 5 V tolerant (VI up to 5.5 V); drives output O7. |
| 10 | GND | power_in | Ground pin; maximum DC ground current per ground pin is ±100 mA. |
| 11 | O7 | tri_state | 3-state non-inverting output 7 with 24 mA drive capability; follows D7 when enabled. |
| 12 | O6 | tri_state | 3-state non-inverting output 6 with 24 mA drive capability; follows D6 when enabled. |
| 13 | O5 | tri_state | 3-state non-inverting output 5 with 24 mA drive capability; follows D5 when enabled. |
| 14 | O4 | tri_state | 3-state non-inverting output 4 with 24 mA drive capability; follows D4 when enabled. |
| 15 | O3 | tri_state | 3-state non-inverting output 3 with 24 mA drive capability; follows D3 when enabled. |
| 16 | O2 | tri_state | 3-state non-inverting output 2 with 24 mA drive capability; follows D2 when enabled. |
| 17 | O1 | tri_state | 3-state non-inverting output 1 with 24 mA drive capability; follows D1 when enabled. |
| 18 | O0 | tri_state | 3-state non-inverting output 0 with 24 mA drive capability; follows D0 when enabled. |
| 19 | OE2 | input | Output Enable input 2; when HIGH, places the outputs in the high-impedance state (5.5 V tolerant input). |
| 20 | VCC | power_in | Supply pin; operating range 2.0 to 3.6 V (designed for 2.3 to 3.6 V), absolute maximum -0.5 to +7.0 V. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | SOIC-20-300mil |
| Category | Logic ICs |
| Pins | 20 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| DC Supply Voltage | VCC | -0.5 |  | 7 | V |  | 2 |
| DC Input Voltage | VI | -0.5 |  | 7 | V |  | 2 |
| DC Output Voltage (3-State) | VO | -0.5 |  | 7 | V | Output in 3-State | 2 |
| DC Output Voltage (HIGH or LOW state) | VO | -0.5 |  |  | V | -0.5 <= VO <= VCC + 0.5, output in HIGH or LOW state | 2 |
| DC Input Diode Current | IIK | -50 |  |  | mA | VI < GND | 2 |
| DC Output Diode Current | IOK | -50 |  | 50 | mA | VO < GND (-50); VO > VCC (+50) | 2 |
| DC Output Source/Sink Current | IO | -50 |  | 50 | mA |  | 2 |
| DC Supply Current Per Supply Pin | ICC | -100 |  | 100 | mA |  | 2 |
| DC Ground Current Per Ground Pin | IGND | -100 |  | 100 | mA |  | 2 |
| Storage Temperature Range | TSTG | -65 |  | 150 | °C |  | 2 |
| Supply Voltage Operating | VCC | 2 | 3.3 | 3.6 | V | Operating | 3 |
| Supply Voltage Data Retention Only | VCC | 1.5 | 3.3 | 3.6 | V | Data Retention Only | 3 |
| Input Voltage | VI | 0 |  | 5.5 | V |  | 3 |
| Output Voltage (HIGH or LOW State) | VO | 0 |  |  | V | HIGH or LOW State; max VCC | 3 |
| Output Voltage (3-State) | VO | 0 |  | 5.5 | V | 3-State | 3 |
| HIGH Level Output Current | IOH | -24 |  |  | mA | VCC = 3.0 V - 3.6 V | 3 |
| LOW Level Output Current | IOL |  |  | 24 | mA | VCC = 3.0 V - 3.6 V | 3 |
| HIGH Level Output Current | IOH | -12 |  |  | mA | VCC = 2.7 V - 3.0 V | 3 |
| LOW Level Output Current | IOL |  |  | 12 | mA | VCC = 2.7 V - 3.0 V | 3 |
| Operating Free-Air Temperature | TA | -40 |  | 85 | °C |  | 3 |
| Input Transition Rise or Fall Rate | t/V | 0 |  | 10 | ns/V | VIN from 0.8 V to 2.0 V, VCC = 3.0 V | 3 |
| HIGH Level Input Voltage | VIH | 2 |  |  | V | 2.7 V <= VCC <= 3.6 V | 3 |
| LOW Level Input Voltage | VIL |  |  | 0.8 | V | 2.7 V <= VCC <= 3.6 V | 3 |
| HIGH Level Output Voltage | VOH | 2.2 |  |  | V | VCC = 2.7 V; IOH = -12 mA | 3 |
| HIGH Level Output Voltage | VOH | 2.4 |  |  | V | VCC = 3.0 V; IOH = -18 mA | 3 |
| LOW Level Output Voltage | VOL |  |  | 0.2 | V | 2.7 V <= VCC <= 3.6 V; IOL = 100 µA | 3 |
| LOW Level Output Voltage | VOL |  |  | 0.4 | V | VCC = 2.7 V; IOL = 12 mA | 3 |
| LOW Level Output Voltage | VOL |  |  | 0.55 | V | VCC = 3.0 V; IOL = 24 mA | 3 |
| 3-State Output Current | IOZ | -5 |  | 5 | µA | VCC = 3.6 V, VIN = VIH or VIL, VOUT = 0 to 5.5 V | 3 |
| Power Off Leakage Current | IOFF |  |  | 10 | µA | VCC = 0, VIN = 5.5 V or VOUT = 5.5 V | 3 |
| Input Leakage Current | IIN | -5 |  | 5 | µA | VCC = 3.6 V, VIN = 5.5 V or GND | 3 |
| Quiescent Supply Current | ICC |  |  | 10 | µA | VCC = 3.6 V, VIN = 5.5 V or GND | 3 |
| Increase in ICC per Input | ΔICC |  |  | 500 | µA | 2.3 <= VCC <= 3.6 V; VIH = VCC - 0.6 V | 3 |
| Propagation Delay Input to Output | tPLH/tPHL | 1.5 |  | 6.5 | ns | VCC = 3.0 V to 3.6 V; CL = 50 pF; RL = 500 ohm | 4 |
| Propagation Delay Input to Output | tPLH/tPHL |  |  | 7.5 | ns | VCC = 2.7 V | 4 |
| Output Enable Time to High and Low Level | tPZH/tPZL | 1.5 |  | 8.5 | ns | VCC = 3.0 V to 3.6 V | 4 |
| Output Enable Time to High and Low Level | tPZH/tPZL |  |  | 9.5 | ns | VCC = 2.7 V | 4 |
| Output Disable Time From High and Low Level | tPHZ/tPLZ | 1.5 |  | 7.5 | ns | VCC = 3.0 V to 3.6 V | 4 |
| Output Disable Time From High and Low Level | tPHZ/tPLZ |  |  | 8.5 | ns | VCC = 2.7 V | 4 |
| Output-to-Output Skew | tOSHL/tOSLH |  |  | 1 | ns |  | 4 |
| Dynamic LOW Peak Voltage | VOLP |  |  | 0.8 | V | VCC = 3.3 V, CL = 50 pF, VIH = 3.3 V, VIL = 0 V, TA = +25°C | 4 |
| Dynamic LOW Valley Voltage | VOLV |  |  | 0.8 | V | VCC = 3.3 V, CL = 50 pF, VIH = 3.3 V, VIL = 0 V, TA = +25°C | 4 |
| Input Capacitance | CIN |  | 7 |  | pF | VCC = 3.3 V, VI = 0 V or VCC | 4 |
| Output Capacitance | COUT |  | 8 |  | pF | VCC = 3.3 V, VI = 0 V or VCC | 4 |
| Power Dissipation Capacitance | CPD |  | 25 |  | pF | 10 MHz, VCC = 3.3 V, VI = 0 V or VCC | 4 |

## CAD (KiCad official)

- Symbol: `MC74LCX541DWR2G`
- Footprint: `Package_SO:SOIC-20W_7.5x12.8mm_P1.27mm`
- 3D model: SOIC-20-300mil (KiCad packages3D, STEP)
- 3D model files: `mc74lcx541dwr2g-etched.step` / `mc74lcx541dwr2g-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `mc74lcx541dwr2g.step` / `mc74lcx541dwr2g.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [onsemi datasheet](https://www.onsemi.com/pdf/datasheet/mc74lcx541dwr2-d.pdf) (9 pp, sha256 `1e105941ba29b800`, retrieved 2026-10-26, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/mc74lcx541dwr2g-datasheet.pdf)