component
MC74LCX244DTR2G
Public Made by Adomby adom
onsemi Buffers, Drivers, Receivers, Transceivers, ETSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
MC74LCX244DTR2G
onsemi · Buffers, Drivers, Receivers, Transceivers · ETSSOP-20
MC74LCX244DTR2G from onsemi, in a ETSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1OE | input | Output Enable for outputs 1O0 to 1O3; when HIGH it disables the outputs into a high-impedance (Z) state, and inputs must not be left floating. |
| 2 | 1D0 | input | Data input for channel 0 of the first group; TTL-compatible input with 5 V tolerance up to VI = 5.5 V, and must not be left floating. |
| 3 | 2O0 | tri_state | 3-State output for channel 0 of the second group, with 24 mA balanced sink and source capability. |
| 4 | 1D1 | input | Data input for channel 1 of the first group; TTL-compatible input with 5 V tolerance up to VI = 5.5 V, and must not be left floating. |
| 5 | 2O1 | tri_state | 3-State output for channel 1 of the second group, with 24 mA balanced sink and source capability. |
| 6 | 1D2 | input | Data input for channel 2 of the first group; TTL-compatible input with 5 V tolerance up to VI = 5.5 V, and must not be left floating. |
| 7 | 2O2 | tri_state | 3-State output for channel 2 of the second group, with 24 mA balanced sink and source capability. |
| 8 | 1D3 | input | Data input for channel 3 of the first group; TTL-compatible input with 5 V tolerance up to VI = 5.5 V, and must not be left floating. |
| 9 | 2O3 | tri_state | 3-State output for channel 3 of the second group, with 24 mA balanced sink and source capability. |
| 10 | GND | power_in | Ground reference; DC ground current is limited to ±100 mA per ground pin. |
| 11 | 2D3 | input | Data input for channel 3 of the second group; TTL-compatible input with 5 V tolerance up to VI = 5.5 V, and must not be left floating. |
| 12 | 1O3 | tri_state | 3-State output for channel 3 of the first group, with 24 mA balanced sink and source capability. |
| 13 | 2D2 | input | Data input for channel 2 of the second group; TTL-compatible input with 5 V tolerance up to VI = 5.5 V, and must not be left floating. |
| 14 | 1O2 | tri_state | 3-State output for channel 2 of the first group, with 24 mA balanced sink and source capability. |
| 15 | 2D1 | input | Data input for channel 1 of the second group; TTL-compatible input with 5 V tolerance up to VI = 5.5 V, and must not be left floating. |
| 16 | 1O1 | tri_state | 3-State output for channel 1 of the first group, with 24 mA balanced sink and source capability. |
| 17 | 2D0 | input | Data input for channel 0 of the second group; TTL-compatible input with 5 V tolerance up to VI = 5.5 V, and must not be left floating. |
| 18 | 1O0 | tri_state | 3-State output for channel 0 of the first group, with 24 mA balanced sink and source capability. |
| 19 | 2OE | input | Output Enable for outputs 2O0 to 2O3; when HIGH it disables the outputs into a high-impedance (Z) state, and inputs must not be left floating. |
| 20 | VCC | power_in | Positive supply, operating from 2.0 V to 5.5 V per the recommended operating conditions. |
| 21 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | ETSSOP-20 |
| Category | Logic |
| Pins | 21 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VCC Supply Voltage (Operating) | VCC | 2 | 5.5 | V | Operating | 3 | |
| VCC Supply Voltage (Data Retention Only) | VCC | 1.5 | 5.5 | V | Data Retention Only | 3 | |
| Input Voltage | VI | 0 | 5.5 | V | 3 | ||
| Output Voltage HIGH or LOW State | VO | 0 | V | HIGH or LOW state; upper limit printed as VCC | 3 | ||
| Output Voltage 3-State | VO | 0 | 5.5 | V | 3-State | 3 | |
| HIGH Level Output Current | IOH | -24 | mA | VCC = 3.0 V − 3.6 V | 3 | ||
| HIGH Level Output Current | IOH | -12 | mA | VCC = 2.7 V − 3.0 V | 3 | ||
| LOW Level Output Current | IOL | 24 | mA | VCC = 3.0 V − 3.6 V | 3 | ||
| LOW Level Output Current | IOL | 12 | mA | VCC = 2.7 V − 3.0 V | 3 | ||
| Operating Free-Air Temperature | TA | -55 | 125 | °C | 3 | ||
| Input Transition Rise or Fall Rate | t/V | 0 | 10 | ns/V | VIN from 0.8 V to 2.0 V, VCC = 3.0 V | 3 | |
| DC Supply Voltage | VCC | -0.5 | 7 | V | 3 | ||
| DC Input Voltage | VI | -0.5 | 7 | V | 3 | ||
| DC Output Voltage | VO | -0.5 | 7 | V | Output in 3-State | 3 | |
| DC Output Voltage | VO | -0.5 | V | Output in HIGH or LOW state (Note 1); upper limit printed as VCC + 0.5 V | 3 | ||
| DC Input Diode Current | IIK | -50 | mA | VI < GND | 3 | ||
| DC Output Diode Current | IOK | -50 | mA | VO < GND | 3 | ||
| DC Output Diode Current | IOK | 50 | mA | VO > VCC | 3 | ||
| DC Output Source/Sink Current | IO | -50 | 50 | mA | 3 | ||
| DC Supply Current | ICC | -100 | 100 | mA | Per supply pin | 3 | |
| DC Ground Current | IGND | -100 | 100 | mA | Per ground pin | 3 | |
| Storage Temperature Range | TSTG | -65 | 150 | °C | 3 | ||
| Lead Temperature | TL | 260 | °C | 1 mm from case for 10 seconds | 3 | ||
| Junction Temperature Under Bias | TJ | 150 | °C | Under bias | 3 | ||
| Thermal Resistance, Junction-to-Ambient | θJA | 140 | °C/W | Note 2: minimum pad spacing on FR4, 10 mm-by-1 inch 2 oz copper trace, no air flow | 3 | ||
| HIGH Level Input Voltage | VIH | 1.7 | V | 2.3 V ≤ VCC ≤ 2.7 V | 4 | ||
| HIGH Level Input Voltage | VIH | 2 | V | 2.7 V ≤ VCC ≤ 3.6 V | 4 | ||
| LOW Level Input Voltage | VIL | 0.7 | V | 2.3 V ≤ VCC ≤ 2.7 V | 4 | ||
| LOW Level Input Voltage | VIL | 0.8 | V | 2.7 V ≤ VCC ≤ 3.6 V | 4 | ||
| HIGH Level Output Voltage | VOH | 1.8 | V | VCC = 2.3 V; IOH = −8 mA | 4 | ||
| HIGH Level Output Voltage | VOH | 2.2 | V | VCC = 2.7 V; IOH = −12 mA | 4 | ||
| HIGH Level Output Voltage | VOH | 2.4 | V | VCC = 3.0 V; IOH = −18 mA | 4 | ||
| LOW Level Output Voltage | VOL | 0.2 | V | 2.3 V ≤ VCC ≤ 3.6 V; IOL = 100 µA | 4 | ||
| LOW Level Output Voltage | VOL | 0.6 | V | VCC = 2.3 V; IOL = 8 mA | 4 | ||
| LOW Level Output Voltage | VOL | 0.4 | V | VCC = 2.7 V; IOL = 12 mA | 4 | ||
| LOW Level Output Voltage | VOL | 0.55 | V | VCC = 3.0 V; IOL = 24 mA | 4 | ||
| 3-State Output Current | IOZ | -5 | 5 | µA | VCC = 3.6 V, VIN = VIH or VIL, VOUT = 0 to 5.5 V | 4 | |
| Power Off Leakage Current | IOFF | 10 | µA | VCC = 0, VIN = 5.5 V or VOUT = 5.5 V | 4 | ||
| Input Leakage Current | IIN | -5 | 5 | µA | VCC = 3.6 V, VIN = 5.5 V or GND | 4 | |
| Quiescent Supply Current | ICC | 10 | µA | VCC = 3.6 V, VIN = 5.5 V or GND | 4 | ||
| Increase in ICC per Input | ICC | 500 | µA | 2.3 ≤ VCC ≤ 3.6 V; VIH = VCC − 0.6 V | 4 | ||
| Propagation Delay Input to Output (tPLH) | tPLH | 1.5 | 6.5 | ns | VCC = 3.0 V to 3.6 V; CL = 50 pF | 4 | |
| Propagation Delay Input to Output (tPHL) | tPHL | 1.5 | 6.5 | ns | VCC = 3.0 V to 3.6 V; CL = 50 pF | 4 | |
| Propagation Delay Input to Output (tPLH) | tPLH | 1.5 | 7.5 | ns | VCC = 2.7 V; CL = 50 pF | 4 | |
| Propagation Delay Input to Output (tPHL) | tPHL | 1.5 | 7.5 | ns | VCC = 2.7 V; CL = 50 pF | 4 | |
| Output Enable Time to High Level (tPZH) | tPZH | 1.5 | 8 | ns | VCC = 3.0 V to 3.6 V; CL = 50 pF | 4 | |
| Output Enable Time to Low Level (tPZL) | tPZL | 1.5 | 8 | ns | VCC = 3.0 V to 3.6 V; CL = 50 pF | 4 | |
| Output Enable Time to High Level (tPZH) | tPZH | 1.5 | 9 | ns | VCC = 2.7 V; CL = 50 pF | 4 | |
| Output Enable Time to Low Level (tPZL) | tPZL | 1.5 | 9 | ns | VCC = 2.7 V; CL = 50 pF | 4 | |
| Output Disable Time From High Level (tPHZ) | tPHZ | 1.5 | 7 | ns | VCC = 3.0 V to 3.6 V; CL = 50 pF | 4 | |
| Output Disable Time From Low Level (tPLZ) | tPLZ | 1.5 | 7 | ns | VCC = 3.0 V to 3.6 V; CL = 50 pF | 4 | |
| Output Disable Time From High Level (tPHZ) | tPHZ | 1.5 | 8 | ns | VCC = 2.7 V; CL = 50 pF | 4 | |
| Output Disable Time From Low Level (tPLZ) | tPLZ | 1.5 | 8 | ns | VCC = 2.7 V; CL = 50 pF | 4 | |
| Output-to-Output Skew HIGH-to-LOW | tOSHL | 1 | ns | Note 4: outputs switching in same direction, HIGH-to-LOW | 4 | ||
| Output-to-Output Skew LOW-to-HIGH | tOSLH | 1 | ns | Note 4: outputs switching in same direction, LOW-to-HIGH | 4 | ||
| Dynamic LOW Peak Voltage | VOLP | 0.8 | V | VCC = 3.3 V, CL = 50 pF, VIH = 3.3 V, VIL = 0 V | 4 | ||
| Dynamic LOW Valley Voltage | VOLV | -0.8 | V | VCC = 3.3 V, CL = 50 pF, VIH = 3.3 V, VIL = 0 V | 4 |
CAD (KiCad official)
- Symbol:
MC74LCX244DTR2G - Footprint:
Package_SO:ETSSOP-20-1EP_4.4x6.5mm_P0.65mm_EP3x4.2mm - 3D model: ETSSOP-20 (KiCad packages3D, STEP)
- 3D model files:
mc74lcx244dtr2g-etched.step/mc74lcx244dtr2g-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mc74lcx244dtr2g.step/mc74lcx244dtr2g.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: onsemi datasheet (11 pp, sha256
d7e3a4c549cea3f9, retrieved 2026-10-20, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# MC74LCX244DTR2G
**onsemi** · Buffers, Drivers, Receivers, Transceivers · ETSSOP-20
MC74LCX244DTR2G from onsemi, in a ETSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1OE | input | Output Enable for outputs 1O0 to 1O3; when HIGH it disables the outputs into a high-impedance (Z) state, and inputs must not be left floating. |
| 2 | 1D0 | input | Data input for channel 0 of the first group; TTL-compatible input with 5 V tolerance up to VI = 5.5 V, and must not be left floating. |
| 3 | 2O0 | tri_state | 3-State output for channel 0 of the second group, with 24 mA balanced sink and source capability. |
| 4 | 1D1 | input | Data input for channel 1 of the first group; TTL-compatible input with 5 V tolerance up to VI = 5.5 V, and must not be left floating. |
| 5 | 2O1 | tri_state | 3-State output for channel 1 of the second group, with 24 mA balanced sink and source capability. |
| 6 | 1D2 | input | Data input for channel 2 of the first group; TTL-compatible input with 5 V tolerance up to VI = 5.5 V, and must not be left floating. |
| 7 | 2O2 | tri_state | 3-State output for channel 2 of the second group, with 24 mA balanced sink and source capability. |
| 8 | 1D3 | input | Data input for channel 3 of the first group; TTL-compatible input with 5 V tolerance up to VI = 5.5 V, and must not be left floating. |
| 9 | 2O3 | tri_state | 3-State output for channel 3 of the second group, with 24 mA balanced sink and source capability. |
| 10 | GND | power_in | Ground reference; DC ground current is limited to ±100 mA per ground pin. |
| 11 | 2D3 | input | Data input for channel 3 of the second group; TTL-compatible input with 5 V tolerance up to VI = 5.5 V, and must not be left floating. |
| 12 | 1O3 | tri_state | 3-State output for channel 3 of the first group, with 24 mA balanced sink and source capability. |
| 13 | 2D2 | input | Data input for channel 2 of the second group; TTL-compatible input with 5 V tolerance up to VI = 5.5 V, and must not be left floating. |
| 14 | 1O2 | tri_state | 3-State output for channel 2 of the first group, with 24 mA balanced sink and source capability. |
| 15 | 2D1 | input | Data input for channel 1 of the second group; TTL-compatible input with 5 V tolerance up to VI = 5.5 V, and must not be left floating. |
| 16 | 1O1 | tri_state | 3-State output for channel 1 of the first group, with 24 mA balanced sink and source capability. |
| 17 | 2D0 | input | Data input for channel 0 of the second group; TTL-compatible input with 5 V tolerance up to VI = 5.5 V, and must not be left floating. |
| 18 | 1O0 | tri_state | 3-State output for channel 0 of the first group, with 24 mA balanced sink and source capability. |
| 19 | 2OE | input | Output Enable for outputs 2O0 to 2O3; when HIGH it disables the outputs into a high-impedance (Z) state, and inputs must not be left floating. |
| 20 | VCC | power_in | Positive supply, operating from 2.0 V to 5.5 V per the recommended operating conditions. |
| 21 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | ETSSOP-20 |
| Category | Logic |
| Pins | 21 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VCC Supply Voltage (Operating) | VCC | 2 | | 5.5 | V | Operating | 3 |
| VCC Supply Voltage (Data Retention Only) | VCC | 1.5 | | 5.5 | V | Data Retention Only | 3 |
| Input Voltage | VI | 0 | | 5.5 | V | | 3 |
| Output Voltage HIGH or LOW State | VO | 0 | | | V | HIGH or LOW state; upper limit printed as VCC | 3 |
| Output Voltage 3-State | VO | 0 | | 5.5 | V | 3-State | 3 |
| HIGH Level Output Current | IOH | -24 | | | mA | VCC = 3.0 V − 3.6 V | 3 |
| HIGH Level Output Current | IOH | -12 | | | mA | VCC = 2.7 V − 3.0 V | 3 |
| LOW Level Output Current | IOL | | | 24 | mA | VCC = 3.0 V − 3.6 V | 3 |
| LOW Level Output Current | IOL | | | 12 | mA | VCC = 2.7 V − 3.0 V | 3 |
| Operating Free-Air Temperature | TA | -55 | | 125 | °C | | 3 |
| Input Transition Rise or Fall Rate | t/V | 0 | | 10 | ns/V | VIN from 0.8 V to 2.0 V, VCC = 3.0 V | 3 |
| DC Supply Voltage | VCC | -0.5 | | 7 | V | | 3 |
| DC Input Voltage | VI | -0.5 | | 7 | V | | 3 |
| DC Output Voltage | VO | -0.5 | | 7 | V | Output in 3-State | 3 |
| DC Output Voltage | VO | -0.5 | | | V | Output in HIGH or LOW state (Note 1); upper limit printed as VCC + 0.5 V | 3 |
| DC Input Diode Current | IIK | -50 | | | mA | VI < GND | 3 |
| DC Output Diode Current | IOK | -50 | | | mA | VO < GND | 3 |
| DC Output Diode Current | IOK | | | 50 | mA | VO > VCC | 3 |
| DC Output Source/Sink Current | IO | -50 | | 50 | mA | | 3 |
| DC Supply Current | ICC | -100 | | 100 | mA | Per supply pin | 3 |
| DC Ground Current | IGND | -100 | | 100 | mA | Per ground pin | 3 |
| Storage Temperature Range | TSTG | -65 | | 150 | °C | | 3 |
| Lead Temperature | TL | | | 260 | °C | 1 mm from case for 10 seconds | 3 |
| Junction Temperature Under Bias | TJ | | | 150 | °C | Under bias | 3 |
| Thermal Resistance, Junction-to-Ambient | θJA | | | 140 | °C/W | Note 2: minimum pad spacing on FR4, 10 mm-by-1 inch 2 oz copper trace, no air flow | 3 |
| HIGH Level Input Voltage | VIH | 1.7 | | | V | 2.3 V ≤ VCC ≤ 2.7 V | 4 |
| HIGH Level Input Voltage | VIH | 2 | | | V | 2.7 V ≤ VCC ≤ 3.6 V | 4 |
| LOW Level Input Voltage | VIL | | | 0.7 | V | 2.3 V ≤ VCC ≤ 2.7 V | 4 |
| LOW Level Input Voltage | VIL | | | 0.8 | V | 2.7 V ≤ VCC ≤ 3.6 V | 4 |
| HIGH Level Output Voltage | VOH | 1.8 | | | V | VCC = 2.3 V; IOH = −8 mA | 4 |
| HIGH Level Output Voltage | VOH | 2.2 | | | V | VCC = 2.7 V; IOH = −12 mA | 4 |
| HIGH Level Output Voltage | VOH | 2.4 | | | V | VCC = 3.0 V; IOH = −18 mA | 4 |
| LOW Level Output Voltage | VOL | | | 0.2 | V | 2.3 V ≤ VCC ≤ 3.6 V; IOL = 100 µA | 4 |
| LOW Level Output Voltage | VOL | | | 0.6 | V | VCC = 2.3 V; IOL = 8 mA | 4 |
| LOW Level Output Voltage | VOL | | | 0.4 | V | VCC = 2.7 V; IOL = 12 mA | 4 |
| LOW Level Output Voltage | VOL | | | 0.55 | V | VCC = 3.0 V; IOL = 24 mA | 4 |
| 3-State Output Current | IOZ | -5 | | 5 | µA | VCC = 3.6 V, VIN = VIH or VIL, VOUT = 0 to 5.5 V | 4 |
| Power Off Leakage Current | IOFF | | | 10 | µA | VCC = 0, VIN = 5.5 V or VOUT = 5.5 V | 4 |
| Input Leakage Current | IIN | -5 | | 5 | µA | VCC = 3.6 V, VIN = 5.5 V or GND | 4 |
| Quiescent Supply Current | ICC | | | 10 | µA | VCC = 3.6 V, VIN = 5.5 V or GND | 4 |
| Increase in ICC per Input | ICC | | | 500 | µA | 2.3 ≤ VCC ≤ 3.6 V; VIH = VCC − 0.6 V | 4 |
| Propagation Delay Input to Output (tPLH) | tPLH | 1.5 | | 6.5 | ns | VCC = 3.0 V to 3.6 V; CL = 50 pF | 4 |
| Propagation Delay Input to Output (tPHL) | tPHL | 1.5 | | 6.5 | ns | VCC = 3.0 V to 3.6 V; CL = 50 pF | 4 |
| Propagation Delay Input to Output (tPLH) | tPLH | 1.5 | | 7.5 | ns | VCC = 2.7 V; CL = 50 pF | 4 |
| Propagation Delay Input to Output (tPHL) | tPHL | 1.5 | | 7.5 | ns | VCC = 2.7 V; CL = 50 pF | 4 |
| Output Enable Time to High Level (tPZH) | tPZH | 1.5 | | 8 | ns | VCC = 3.0 V to 3.6 V; CL = 50 pF | 4 |
| Output Enable Time to Low Level (tPZL) | tPZL | 1.5 | | 8 | ns | VCC = 3.0 V to 3.6 V; CL = 50 pF | 4 |
| Output Enable Time to High Level (tPZH) | tPZH | 1.5 | | 9 | ns | VCC = 2.7 V; CL = 50 pF | 4 |
| Output Enable Time to Low Level (tPZL) | tPZL | 1.5 | | 9 | ns | VCC = 2.7 V; CL = 50 pF | 4 |
| Output Disable Time From High Level (tPHZ) | tPHZ | 1.5 | | 7 | ns | VCC = 3.0 V to 3.6 V; CL = 50 pF | 4 |
| Output Disable Time From Low Level (tPLZ) | tPLZ | 1.5 | | 7 | ns | VCC = 3.0 V to 3.6 V; CL = 50 pF | 4 |
| Output Disable Time From High Level (tPHZ) | tPHZ | 1.5 | | 8 | ns | VCC = 2.7 V; CL = 50 pF | 4 |
| Output Disable Time From Low Level (tPLZ) | tPLZ | 1.5 | | 8 | ns | VCC = 2.7 V; CL = 50 pF | 4 |
| Output-to-Output Skew HIGH-to-LOW | tOSHL | | | 1 | ns | Note 4: outputs switching in same direction, HIGH-to-LOW | 4 |
| Output-to-Output Skew LOW-to-HIGH | tOSLH | | | 1 | ns | Note 4: outputs switching in same direction, LOW-to-HIGH | 4 |
| Dynamic LOW Peak Voltage | VOLP | | | 0.8 | V | VCC = 3.3 V, CL = 50 pF, VIH = 3.3 V, VIL = 0 V | 4 |
| Dynamic LOW Valley Voltage | VOLV | -0.8 | | | V | VCC = 3.3 V, CL = 50 pF, VIH = 3.3 V, VIL = 0 V | 4 |
## CAD (KiCad official)
- Symbol: `MC74LCX244DTR2G`
- Footprint: `Package_SO:ETSSOP-20-1EP_4.4x6.5mm_P0.65mm_EP3x4.2mm`
- 3D model: ETSSOP-20 (KiCad packages3D, STEP)
- 3D model files: `mc74lcx244dtr2g-etched.step` / `mc74lcx244dtr2g-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `mc74lcx244dtr2g.step` / `mc74lcx244dtr2g.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [onsemi datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588883740277399552) (11 pp, sha256 `d7e3a4c549cea3f9`, retrieved 2026-10-20, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/mc74lcx244dtr2g-datasheet.pdf)