component

MC74LCX244ADTR2G

Public Made by Adom

by adom

onsemi Buffer/Driver/Transceiver, TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentlogic icsmc74lcx244adtr2gfactory-2.0.0extractor-text

Verified MC74LCX244ADTR2G

by Ray · last 30 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

30 Oct 2026RayPublished by the parts factory: tier mfr, 20 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: MC74LCX244ADTR2G · TSSOP-20 · 20 pins
  • ✓copper: 20 copper pads, none touching another net
  • ✓datasheet: all 20 pin names found in the 9-page datasheet
  • ✓distributor: lcsc C3756378, digikey 488-MC74LCX244ADTR2GTR-ND, mouser 863-MC74LCX244ADTR2G
  • ✓family: TSSOP-20_4.4x6.5mm_P0.65mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-1ilm0bc2/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 20 pins = 20 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 20 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ mc74lcx244adtr2g.kicad_sym✓ mc74lcx244adtr2g.kicad_mod✓ mc74lcx244adtr2g.step
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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 14h ago
viewers mc74lcx244adtr2g: viewers · Ray 14h ago
mc74lcx244adtr2g-etched.glb Publish 0.1.0 · Ray 14h ago
mc74lcx244adtr2g-etched.step mc74lcx244adtr2g: factory component page (tier=mfr) · Ray 14h ago
mc74lcx244adtr2g-hero.glb mc74lcx244adtr2g: hero GLB from the etched model (keeps the MPN mark) · Ray 14h ago
mc74lcx244adtr2g-hero.overlay.json Publish 0.1.0 · Ray 14h ago
mc74lcx244adtr2g.glb Publish 0.1.0 · Ray 14h ago
mc74lcx244adtr2g.kicad_mod Publish 0.1.0 · Ray 14h ago
mc74lcx244adtr2g.kicad_sym Publish 0.1.0 · Ray 14h ago
mc74lcx244adtr2g.lbr Publish 0.1.0 · Ray 14h ago
mc74lcx244adtr2g.step Publish 0.1.0 · Ray 14h ago
package.json Publish 0.1.0 · Ray 14h ago
page.json Set visibility: public · Ray 14h ago
README.md Publish 0.1.0 · Ray 14h ago
verification.json Verified: Published by the parts factory: tier mfr, 20 pins · Ray 14h ago

MC74LCX244ADTR2G

onsemi · Buffer/Driver/Transceiver · TSSOP-20

MC74LCX244ADTR2G from onsemi, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1OE input Output Enable input for buffer bank 1; when HIGH it disables outputs 1O0 to 1O3 into a high-impedance state.
2 1D0 input Data input 1D0 is TTL compatible, accepts up to 5.5 V, and must not be left floating.
3 2O0 tri_state 3-state non-inverting output 2O0 with 24 mA balanced sink and source drive capability.
4 1D1 input Data input 1D1 is TTL compatible, accepts up to 5.5 V, and must not be left floating.
5 2O1 tri_state 3-state non-inverting output 2O1 with 24 mA balanced sink and source drive capability.
6 1D2 input Data input 1D2 is TTL compatible, accepts up to 5.5 V, and must not be left floating.
7 2O2 tri_state 3-state non-inverting output 2O2 with 24 mA balanced sink and source drive capability.
8 1D3 input Data input 1D3 is TTL compatible, accepts up to 5.5 V, and must not be left floating.
9 2O3 tri_state 3-state non-inverting output 2O3 with 24 mA balanced sink and source drive capability.
10 GND power_in Ground reference pin for the device at 0 V.
11 2D3 input Data input 2D3 is TTL compatible, accepts up to 5.5 V, and must not be left floating.
12 1O3 tri_state 3-state non-inverting output 1O3 with 24 mA balanced sink and source drive capability.
13 2D2 input Data input 2D2 is TTL compatible, accepts up to 5.5 V, and must not be left floating.
14 1O2 tri_state 3-state non-inverting output 1O2 with 24 mA balanced sink and source drive capability.
15 2D1 input Data input 2D1 is TTL compatible, accepts up to 5.5 V, and must not be left floating.
16 1O1 tri_state 3-state non-inverting output 1O1 with 24 mA balanced sink and source drive capability.
17 2D0 input Data input 2D0 is TTL compatible, accepts up to 5.5 V, and must not be left floating.
18 1O0 tri_state 3-state non-inverting output 1O0 with 24 mA balanced sink and source drive capability.
19 2OE input Output Enable input for buffer bank 2; when HIGH it disables outputs 2O0 to 2O3 into a high-impedance state.
20 VCC power_in Supply voltage pin; the device operates from 1.65 V to 3.6 V.

Key specifications

Parameter Value
Manufacturer onsemi
Package TSSOP-20
Category Logic ICs
Pins 20

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply Voltage Operating VCC 1.65 3.3 3.6 V 4
Supply Voltage Data Retention Only VCC 1.5 3.3 3.6 V 4
Digital Input Voltage VI 0 5.5 V 4
Output Voltage Active Mode VO 0 V Active Mode (High or Low State); max = VCC 4
Output Voltage Tri-State Mode VO 0 5.5 V Tri-State Mode 4
Output Voltage Power Down Mode VO 0 5.5 V Power Down Mode (VCC = 0 V) 4
Operating Free-Air Temperature TA -40 125 °C 4
Input Transition Rise or Fall Rate tr, tf 0 10 ns/V VI from 0.8 V to 2.0 V, VCC = 3.0 V 4
DC Input Voltage VI -0.5 6.5 V Note 1 4
DC Output Voltage Active Mode VO -0.5 V Active-Mode (High or Low State); max = VCC + 0.5 4
DC Output Voltage Tri-State Mode VO -0.5 6.5 V Tri-State Mode 4
DC Output Voltage Power-Down Mode VO -0.5 6.5 V Power-Down Mode (VCC = 0 V) 4
DC Input Diode Current IIK -50 mA VIN < GND 4
DC Output Diode Current IOK -50 mA VOUT < GND 4
DC Output Source/Sink Current IO -50 50 mA 4
DC Supply Current Per Supply Pin ICC -100 100 mA 4
DC Supply Current Per Ground Pin IGND -100 100 mA 4
Storage Temperature Range TSTG -65 150 °C 4
ESD Withstand Voltage Human Body Model VESD 2000 V HBM; printed as > 2000 V 4
Latchup Performance ILATCHUP -100 100 mA 4
High-Level Input Voltage VIH 1.7 V VCC 2.3 to 2.7 V; TA = -40C to +125C 5
High-Level Input Voltage VIH 2 V VCC 2.7 to 3.6 V; TA = -40C to +125C 5
Low-Level Input Voltage VIL 0.7 V VCC 2.3 to 2.7 V; TA = -40C to +125C 5
Low-Level Input Voltage VIL 0.8 V VCC 2.7 to 3.6 V; TA = -40C to +125C 5
High-Level Output Voltage VOH 1.2 V VI = VIH or VIL; IOH = -4 mA; VCC 1.65 V; TA = -40C to +125C 5
High-Level Output Voltage VOH 1.8 V VI = VIH or VIL; IOH = -8 mA; VCC 2.3 V; TA = -40C to +125C 5
High-Level Output Voltage VOH 2.2 V VI = VIH or VIL; IOH = -12 mA; VCC 2.7 V; TA = -40C to +125C 5
High-Level Output Voltage VOH 2.4 V VI = VIH or VIL; IOH = -16 mA; VCC 3.0 V; TA = -40C to +125C 5
Low-Level Output Voltage VOL 0.2 V VI = VIH or VIL; IOL = 100 A; VCC 1.65 to 3.6 V; TA = -40C to +125C 5
Low-Level Output Voltage VOL 0.45 V VI = VIH or VIL; IOL = 4 mA; VCC 1.65 V; TA = -40C to +125C 5
Low-Level Output Voltage VOL 0.6 V VI = VIH or VIL; IOL = 8 mA; VCC 2.3 V; TA = -40C to +125C 5
Low-Level Output Voltage VOL 0.4 V VI = VIH or VIL; IOL = 12 mA; VCC 2.7 V; TA = -40C to +125C 5
Input Leakage Current II -5 5 A VI = 0 to 5.5 V; VCC 3.6 V; TA = -40C to +125C 5
3-State Output Leakage Current IOZ -5 5 A VI = VIH or VIL; VO = 0 V to 5.5 V; VCC 3.6 V; TA = -40C to +125C 5
Power Off Leakage Current IOFF 20 A VI = 5.5 V or VO = 5.5 V; VCC 0 V; TA = -40C to +125C 5
Quiescent Supply Current ICC 10 A VI = 5.5 V or GND; VCC 3.6 V; TA = -40C to +125C 5
Increase in ICC per Input ΔICC 500 A VIH = VCC - 0.6 V; VCC 2.3 to 3.6 V; TA = -40C to +125C 5
Propagation Delay D to O tPLH, tPHL 10.3 ns VCC 1.65 to 1.95 V; TA = -40C to +125C 6
Propagation Delay D to O tPLH, tPHL 7.8 ns VCC 2.3 to 2.7 V; TA = -40C to +125C 6
Propagation Delay D to O tPLH, tPHL 7.5 ns VCC 2.7 V; TA = -40C to +125C 6
Propagation Delay D to O tPLH, tPHL 6.5 ns VCC 3.0 to 3.6 V; TA = -40C to +125C 6
Output Enable Time OE to O tPZH, tPZL 13 ns VCC 1.65 to 1.95 V; TA = -40C to +125C 6
Output Enable Time OE to O tPZH, tPZL 10 ns VCC 2.3 to 2.7 V; TA = -40C to +125C 6
Output Enable Time OE to O tPZH, tPZL 9 ns VCC 2.7 V; TA = -40C to +125C 6
Output Enable Time OE to O tPZH, tPZL 8 ns VCC 3.0 to 3.6 V; TA = -40C to +125C 6
Output Disable Time OE to O tPHZ, tPLZ 11 ns VCC 1.65 to 1.95 V; TA = -40C to +125C 6
Output Disable Time OE to O tPHZ, tPLZ 8.4 ns VCC 2.3 to 2.7 V; TA = -40C to +125C 6
Output Disable Time OE to O tPHZ, tPLZ 8 ns VCC 2.7 V; TA = -40C to +125C 6
Output Disable Time OE to O tPHZ, tPLZ 7 ns VCC 3.0 to 3.6 V; TA = -40C to +125C 6
Output to Output Skew tOSHL, tOSLH 1 ns VCC 3.0 to 3.6 V; TA = -40C to +125C 6
Input Capacitance CIN 7 pF VCC = 3.3 V, VI = 0 V or VCC; TA = 25C 6
Output Capacitance COUT 8 pF VCC = 3.3 V, VI = 0 V or VCC; TA = 25C 6
Power Dissipation Capacitance CPD 25 pF 10 MHz, VCC = 3.3 V, VI = 0 V or VCC; TA = 25C 6

CAD (KiCad official)

  • Symbol: MC74LCX244ADTR2G
  • Footprint: Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm
  • 3D model: TSSOP-20 (KiCad packages3D, STEP)
  • 3D model files: mc74lcx244adtr2g-etched.step / mc74lcx244adtr2g-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mc74lcx244adtr2g.step / mc74lcx244adtr2g.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (9 pp, sha256 2c1011161729bb7b, retrieved 2026-10-30, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF