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MC74LCX138DR2G

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onsemi Logic ICs, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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MC74LCX138DR2G

onsemi · Logic ICs · SOIC-16

MC74LCX138DR2G from onsemi, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 A0 input Address input, least significant bit of the 3-to-8 binary select; inputs are 5 V tolerant (VI up to 5.5 V) and must not be left floating.
2 A1 input Address input, middle bit of the 3-to-8 binary select; inputs are 5 V tolerant (VI up to 5.5 V) and must not be left floating.
3 A2 input Address input, most significant bit of the 3-to-8 binary select; inputs are 5 V tolerant (VI up to 5.5 V) and must not be left floating.
4 E1 input Active-LOW enable input; all outputs are HIGH unless E1 and E2 are LOW and E3 is HIGH.
5 E2 input Active-LOW enable input; all outputs are HIGH unless E1 and E2 are LOW and E3 is HIGH.
6 E3 input Active-HIGH enable input; must be HIGH, together with E1 and E2 LOW, for the addressed output to go LOW.
7 O7 output Active-LOW mutually exclusive decoder output with 24 mA balanced sink and source capability.
8 GND power_in Ground reference pin for the device.
9 O6 output Active-LOW mutually exclusive decoder output with 24 mA balanced sink and source capability.
10 O5 output Active-LOW mutually exclusive decoder output with 24 mA balanced sink and source capability.
11 O4 output Active-LOW mutually exclusive decoder output with 24 mA balanced sink and source capability.
12 O3 output Active-LOW mutually exclusive decoder output with 24 mA balanced sink and source capability.
13 O2 output Active-LOW mutually exclusive decoder output with 24 mA balanced sink and source capability.
14 O1 output Active-LOW mutually exclusive decoder output with 24 mA balanced sink and source capability.
15 O0 output Active-LOW mutually exclusive decoder output with 24 mA balanced sink and source capability.
16 VCC power_in Positive supply pin; the datasheet specifies operation from 2.3 V to 3.6 V (absolute maximum 7.0 V).

Key specifications

Parameter Value
Manufacturer onsemi
Package SOIC-16
Category Logic ICs
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
DC Input Diode Current IIK -50 mA VI < GND 3
DC Output Diode Current IOK -50 mA VO < GND 3
DC Output Diode Current IOK 50 mA VO > VCC 3
DC Output Source/Sink Current IO 50 mA 3
DC Supply Current ICC 100 mA Per supply pin 3
DC Ground Current IGND 100 mA Per ground pin 3
Storage Temperature Range TSTG -65 150 °C 3
DC Supply Voltage VCC -0.5 7 V 3
DC Input Voltage VI -0.5 7 V 3
DC Output Voltage VO -0.5 V Output in HIGH or LOW state (Note 1) 3
Supply Voltage VCC 2 3.6 V Operating 4
Supply Voltage VCC 1.5 V Data retention only 4
Input Voltage VI 0 5.5 V 4
Output Voltage (HIGH or LOW State) (3-State) VO 0 V Upper limit printed as VCC 4
HIGH Level Output Current IOH -24 mA VCC = 3.0 V − 3.6 V 4
HIGH Level Output Current IOH -12 mA VCC = 2.7 V − 3.0 V 4
HIGH Level Output Current IOH -8 mA VCC = 2.3 V − 2.7 V 4
LOW Level Output Current IOL 24 mA VCC = 3.0 V − 3.6 V 4
LOW Level Output Current IOL 12 mA VCC = 2.7 V − 3.0 V 4
LOW Level Output Current IOL 8 mA VCC = 2.3 V − 2.7 V 4
Operating Free-Air Temperature TA -40 85 °C 4
Input Transition Rise or Fall Rate t/V 0 10 ns/V VIN from 0.8 V to 2.0 V, VCC = 3.0 V 4
HIGH Level Input Voltage VIH 1.7 V 2.3 V ≤ VCC ≤ 2.7 V 4
HIGH Level Input Voltage VIH 2 V 2.7 V ≤ VCC ≤ 3.6 V 4
LOW Level Input Voltage VIL 0.7 V 2.3 V ≤ VCC ≤ 2.7 V 4
LOW Level Input Voltage VIL 0.8 V 2.7 V ≤ VCC ≤ 3.6 V 4
HIGH Level Output Voltage VOH 1.8 V VCC = 2.3 V; IOH = −8 mA 4
HIGH Level Output Voltage VOH 2.2 V VCC = 2.7 V; IOH = −12 mA 4
HIGH Level Output Voltage VOH 2.4 V VCC = 3.0 V; IOH = −18 mA 4
LOW Level Output Voltage VOL 0.2 V 2.3 V ≤ VCC ≤ 3.6 V; IOL = 100 µA 4
LOW Level Output Voltage VOL 0.6 V VCC = 2.3 V; IOL = 8 mA 4
LOW Level Output Voltage VOL 0.4 V VCC = 2.7 V; IOL = 12 mA 4
LOW Level Output Voltage VOL 0.55 V VCC = 3.0 V; IOL = 24 mA 4
Power Off Leakage Current IOFF 10 µA VCC = 0, VIN = 5.5 V or VOUT = 5.5 V 4
Input Leakage Current IIN 5 µA VCC = 3.6 V, VIN = 5.5 V or GND 4
Quiescent Supply Current ICC 10 µA VCC = 3.6 V, VIN = 5.5 V or GND 4
Increase in ICC per Input ICC 500 µA 2.3 V ≤ VCC ≤ 3.6 V; VIH = VCC − 0.6 V 4
Propagation Delay An to On (tPLH) tPLH 1.5 6 ns VCC = 3.3 V ±0.3 V; CL = 50 pF 4
Propagation Delay An to On (tPHL) tPHL 1.5 6 ns VCC = 3.3 V ±0.3 V; CL = 50 pF 4
Propagation Delay An to On (tPLH) tPLH 1.5 7 ns VCC = 2.7 V; CL = 50 pF 4
Propagation Delay An to On (tPHL) tPHL 1.5 7 ns VCC = 2.7 V; CL = 50 pF 4
Propagation Delay An to On (tPLH) tPLH 1.5 7.2 ns VCC = 2.5 V ±0.2 V; CL = 30 pF 4
Propagation Delay An to On (tPHL) tPHL 1.5 7.2 ns VCC = 2.5 V ±0.2 V; CL = 30 pF 4
Propagation Delay E1, E2 to On (tPLH) tPLH 1.5 6.5 ns VCC = 3.3 V ±0.3 V; CL = 50 pF 4
Propagation Delay E1, E2 to On (tPHL) tPHL 1.5 6.5 ns VCC = 3.3 V ±0.3 V; CL = 50 pF 4
Propagation Delay E1, E2 to On (tPLH) tPLH 1.5 7.5 ns VCC = 2.7 V; CL = 50 pF 4
Propagation Delay E1, E2 to On (tPHL) tPHL 1.5 7.5 ns VCC = 2.7 V; CL = 50 pF 4
Propagation Delay E1, E2 to On (tPLH) tPLH 1.5 8.4 ns VCC = 2.5 V ±0.2 V; CL = 30 pF 4
Propagation Delay E1, E2 to On (tPHL) tPHL 1.5 8.4 ns VCC = 2.5 V ±0.2 V; CL = 30 pF 4
Propagation Delay E3 to On (tPLH) tPLH 1.5 6 ns VCC = 3.3 V ±0.3 V; CL = 50 pF 4
Propagation Delay E3 to On (tPHL) tPHL 1.5 6 ns VCC = 3.3 V ±0.3 V; CL = 50 pF 4
Propagation Delay E3 to On (tPLH) tPLH 1.5 7 ns VCC = 2.7 V; CL = 50 pF 4
Propagation Delay E3 to On (tPHL) tPHL 1.5 7 ns VCC = 2.7 V; CL = 50 pF 4
Propagation Delay E3 to On (tPLH) tPLH 1.5 7.2 ns VCC = 2.5 V ±0.2 V; CL = 30 pF 4
Propagation Delay E3 to On (tPHL) tPHL 1.5 7.2 ns VCC = 2.5 V ±0.2 V; CL = 30 pF 4
Output-to-Output Skew (HIGH-to-LOW) tOSHL 1 ns Note 3 4
Output-to-Output Skew (LOW-to-HIGH) tOSLH 1 ns Note 3 4

CAD (KiCad official)

  • Symbol: MC74LCX138DR2G
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOIC-16 (KiCad packages3D, STEP)
  • 3D model files: mc74lcx138dr2g-etched.step / mc74lcx138dr2g-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mc74lcx138dr2g.step / mc74lcx138dr2g.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (8 pp, sha256 e247abdfb8e232ea, retrieved 2026-10-18, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF