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MC74LCX06DG

Public Made by Adom

by adom

onsemi Inverters, SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Contents

README

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MC74LCX06DG

onsemi · Inverters · SOIC-14

MC74LCX06DG from onsemi, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 A0 input Data input to inverter 0, 5.5 V tolerant (VI max 5.5 V) with TTL-compatible thresholds.
2 O0 output Open-drain inverting output of A0 (low when A0 is high, high-impedance when A0 is low), 24 mA sink capability at 3.0 V.
3 A1 input Data input to inverter 1, 5.5 V tolerant (VI max 5.5 V) with TTL-compatible thresholds.
4 O1 output Open-drain inverting output of A1 (low when A1 is high, high-impedance when A1 is low), 24 mA sink capability at 3.0 V.
5 A2 input Data input to inverter 2, 5.5 V tolerant (VI max 5.5 V) with TTL-compatible thresholds.
6 O2 output Open-drain inverting output of A2 (low when A2 is high, high-impedance when A2 is low), 24 mA sink capability at 3.0 V.
7 GND power_in Ground pin (0 V reference).
8 O5 output Open-drain inverting output of A5 (low when A5 is high, high-impedance when A5 is low), 24 mA sink capability at 3.0 V.
9 A5 input Data input to inverter 5, 5.5 V tolerant (VI max 5.5 V) with TTL-compatible thresholds.
10 O4 output Open-drain inverting output of A4 (low when A4 is high, high-impedance when A4 is low), 24 mA sink capability at 3.0 V.
11 A4 input Data input to inverter 4, 5.5 V tolerant (VI max 5.5 V) with TTL-compatible thresholds.
12 O3 output Open-drain inverting output of A3 (low when A3 is high, high-impedance when A3 is low), 24 mA sink capability at 3.0 V.
13 A3 input Data input to inverter 3, 5.5 V tolerant (VI max 5.5 V) with TTL-compatible thresholds.
14 VCC power_in Supply voltage, operating range 1.65 V to 5.5 V (absolute maximum -0.5 to +6.5 V).

Key specifications

Parameter Value
Manufacturer onsemi
Package SOIC-14
Category Logic ICs
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
DC Supply Voltage VCC -0.5 6.5 V 3
DC Input Voltage VI -0.5 6.5 V 3
DC Output Voltage Active Mode VO -0.5 6.5 V Active-Mode (High or Low State), printed -0.5 to VCC + 0.5 3
DC Output Voltage Tri-State Mode VO -0.5 6.5 V Tri-State Mode 3
DC Output Voltage Power-Down Mode VO -0.5 6.5 V Power-Down Mode (VCC = 0 V) 3
DC Input Diode Current IIK -50 mA VI < GND 3
DC Output Diode Current IOK -50 mA VO < GND 3
DC Output Source/Sink Current IO -50 50 mA 3
DC Supply Current per Supply Pin or Ground Pin ICC or IGND -100 100 mA 3
Storage Temperature Range TSTG -65 150 °C 3
Lead Temperature TL 260 °C 1 mm from Case for 10 secs 3
Junction Temperature Under Bias TJ 150 °C 3
Thermal Resistance SOIC-14 NB θJA 116 °C/W SOIC-14 NB 3
Power Dissipation in Still Air at 125 °C SOIC-14 NB PD 1077 mW SOIC-14 NB 3
ESD Withstand Voltage HBM VESD 2000 V Human Body Model 3
Supply Voltage Operating VCC 1.65 3.3 5.5 V Operating 3
Supply Voltage Data Retention Only VCC 1.5 3.3 5.5 V Data Retention Only 3
Digital Input Voltage VI 0 5.5 V 3
Output Voltage Active Mode VO 0 V Active Mode (High or Low State), upper limit printed VCC 3
Output Voltage Tri-State Mode VO 0 5.5 V Tri-State Mode 3
Output Voltage Power Down Mode VO 0 5.5 V Power Down Mode (VCC = 0 V) 3
Operating Free-Air Temperature TA -40 125 °C 3
Input Rise or Fall Rate tr, tf 0 20 nS/V VCC = 1.65 V to 1.95 V 3
Input Rise or Fall Rate tr, tf 0 10 nS/V VI from 0.8 V to 2.0 V, VCC = 3.0 V 3
Input Rise or Fall Rate tr, tf 0 5 nS/V VCC = 4.5 V to 5.5 V 3
HIGH Level Input Voltage VIH 2 V VCC = 3.0 - 3.6 V, TA = -40 to +85 °C 4
HIGH Level Input Voltage VIH 1.7 V VCC = 2.3 - 2.7 V, TA = -40 to +85 °C 4
LOW Level Input Voltage VIL 0.8 V VCC = 3.0 - 3.6 V, TA = -40 to +85 °C 4
LOW Level Input Voltage VIL 0.7 V VCC = 2.3 - 2.7 V, TA = -40 to +85 °C 4
Low-Level Output Voltage VOL 0.1 V VI = VIH or VIL, IOL = 100 µA, VCC = 1.65 to 5.5 V 4
Low-Level Output Voltage VOL 0.24 V VI = VIH or VIL, IOL = 4 mA, VCC = 1.65 V 4
Low-Level Output Voltage VOL 0.3 V VI = VIH or VIL, IOL = 8 mA, VCC = 2.3 V 4
Low-Level Output Voltage VOL 0.4 V VI = VIH or VIL, IOL = 12 mA, VCC = 2.7 V 4
Low-Level Output Voltage VOL 0.55 V VI = VIH or VIL, IOL = 24 mA, VCC = 3.0 V 4
Low-Level Output Voltage VOL 0.6 V VI = VIH or VIL, IOL = 32 mA, VCC = 4.5 V 4
Input Leakage Current II -5 5 µA VI = 0 to 5.5 V, VCC = 3.6 V 4
Power Off Leakage Current IOFF 10 µA VI = 5.5 V or VO = 5.5 V, VCC = 0 4
3-State Output Leakage Current IOZ -5 5 µA VI = VIH or VIL, VO = 0 to 5.5 V, VCC = 3.6 V 4
Quiescent Supply Current ICC 10 µA VI = 5.5 V or GND, VCC = 3.6 V 4
Increase in ICC per Input ΔICC 500 µA One input at VCC - 0.6 V, other inputs at VCC or GND, VCC = 2.3 to 3.6 V 4
Increase in ICC per Input ΔICC 1 mA One input at VCC - 0.6 V, other inputs at VCC or GND, VCC = 4.5 to 5.5 V 4
Propagation Delay, Input to Output tPLZ, tPZL 6.5 ns VCC = 1.65 to 1.95 V 4
Propagation Delay, Input to Output tPLZ, tPZL 3.5 ns VCC = 2.3 to 2.7 V 4
Propagation Delay, Input to Output tPLZ, tPZL 4.1 ns VCC = 2.7 V 4
Propagation Delay, Input to Output tPLZ, tPZL 3.7 ns VCC = 3.0 to 3.6 V 4
Propagation Delay, Input to Output tPLZ, tPZL 3.2 ns VCC = 4.5 to 5.5 V 4
Dynamic LOW Peak Voltage VOLP 0.9 V VCC = 3.3 V, CL = 50 pF, VIH = 3.3 V, VIL = 0 V, TA = +25 °C 5
Dynamic LOW Valley Voltage VOLV -0.8 V VCC = 3.3 V, CL = 50 pF, VIH = 3.3 V, VIL = 0 V, TA = +25 °C 5
Input Capacitance CIN 7 pF VCC = 3.3 V, VI = 0 V or VCC 5
Output Capacitance COUT 8 pF VCC = 3.3 V, VI = 0 V or VCC 5
Power Dissipation Capacitance CPD 25 pF 10 MHz, VCC = 3.3 V, VI = 0 V or VCC 5

CAD (KiCad official)

  • Symbol: MC74LCX06DG
  • Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
  • 3D model: SOIC-14 (KiCad packages3D, STEP)
  • 3D model files: mc74lcx06dg-etched.step / mc74lcx06dg-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mc74lcx06dg.step / mc74lcx06dg.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (11 pp, sha256 48eaca32b59842fd, retrieved 2026-10-27, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF