MC74LCX00DTR2G

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  "version": "0.1.0",
  "type": "component",
  "description": "onsemi Logic Gates, TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "logic",
    "mc74lcx00dtr2g",
    "factory-2.0.0",
    "extractor-text"
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  "component": {
    "mpn": "MC74LCX00DTR2G",
    "manufacturer": "onsemi",
    "package": "TSSOP-14",
    "pin_count": 14,
    "category": "Logic",
    "subcategory": "Logic Gates",
    "datasheet": "https://www.onsemi.com/pdf/datasheet/mc74lcx00dtr2-d.pdf",
    "parts": {
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      "lbr": "mc74lcx00dtr2g.lbr"
    },
    "distributor_links": {
      "lcsc": "C463804",
      "mouser": "863-MC74LCX00DTR2G"
    },
    "distributor_check": {
      "checked_at": "2026-10-21T19:18:47Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": null,
        "status": "quota"
      },
      "mouser": {
        "pn": "863-MC74LCX00DTR2G",
        "status": "found"
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    },
    "pins": [
      {
        "number": "1",
        "name": "A0",
        "type": "input",
        "description": "Data input A of NAND gate 0; it is 5 V tolerant with VI specified up to 5.5 V and must not be left floating."
      },
      {
        "number": "2",
        "name": "B0",
        "type": "input",
        "description": "Data input B of NAND gate 0; it is 5 V tolerant with VI specified up to 5.5 V and must not be left floating."
      },
      {
        "number": "3",
        "name": "O0",
        "type": "output",
        "description": "Output of NAND gate 0, rated for 24 mA balanced sink and source at VCC 3.0 V to 3.6 V (IOL +24 mA, IOH −24 mA)."
      },
      {
        "number": "4",
        "name": "A1",
        "type": "input",
        "description": "Data input A of NAND gate 1; it is 5 V tolerant with VI specified up to 5.5 V and must not be left floating."
      },
      {
        "number": "5",
        "name": "B1",
        "type": "input",
        "description": "Data input B of NAND gate 1; it is 5 V tolerant with VI specified up to 5.5 V and must not be left floating."
      },
      {
        "number": "6",
        "name": "O1",
        "type": "output",
        "description": "Output of NAND gate 1, rated for 24 mA balanced sink and source at VCC 3.0 V to 3.6 V (IOL +24 mA, IOH −24 mA)."
      },
      {
        "number": "7",
        "name": "GND",
        "type": "power_in",
        "description": "Ground reference; the datasheet limits ground current to 100 mA per ground pin (absolute maximum)."
      },
      {
        "number": "8",
        "name": "O3",
        "type": "output",
        "description": "Output of NAND gate 3, rated for 24 mA balanced sink and source at VCC 3.0 V to 3.6 V (IOL +24 mA, IOH −24 mA)."
      },
      {
        "number": "9",
        "name": "B3",
        "type": "input",
        "description": "Data input B of NAND gate 3; it is 5 V tolerant with VI specified up to 5.5 V and must not be left floating."
      },
      {
        "number": "10",
        "name": "A3",
        "type": "input",
        "description": "Data input A of NAND gate 3; it is 5 V tolerant with VI specified up to 5.5 V and must not be left floating."
      },
      {
        "number": "11",
        "name": "O2",
        "type": "output",
        "description": "Output of NAND gate 2, rated for 24 mA balanced sink and source at VCC 3.0 V to 3.6 V (IOL +24 mA, IOH −24 mA)."
      },
      {
        "number": "12",
        "name": "B2",
        "type": "input",
        "description": "Data input B of NAND gate 2; it is 5 V tolerant with VI specified up to 5.5 V and must not be left floating."
      },
      {
        "number": "13",
        "name": "A2",
        "type": "input",
        "description": "Data input A of NAND gate 2; it is 5 V tolerant with VI specified up to 5.5 V and must not be left floating."
      },
      {
        "number": "14",
        "name": "VCC",
        "type": "power_in",
        "description": "Positive supply; recommended operating range is 2.0 V to 3.6 V (1.5 V for data retention only) and the absolute maximum DC supply is 7.0 V."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The pinout comes from Figure 1 (Top View), whose text layer is scrambled in the extracted text. The ; The datasheet covers SOIC-14 and TSSOP-14 with the same logic function, and the pin list is for the ; Per-pin electrical limits are specified at device level, not per pin: VCC operating range, input VI "
        ],
        "pages_sent": 7,
        "cost_usd": 0.0497,
        "at": "2026-10-21T19:13:50"
      },
      "datasheet": {
        "url": "https://www.onsemi.com/pdf/datasheet/mc74lcx00dtr2-d.pdf",
        "pages": 7,
        "sha256": "74d7d652c48b8b15",
        "source_tier": "mfr"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 14,
        "described": 14,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
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}