component
MC74HCT245ADTG
Public Made by Adomby adom
onsemi Buffers / Drivers, TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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MC74HCT245ADTG
onsemi · Buffers / Drivers · TSSOP-20
MC74HCT245ADTG from onsemi, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | DIRECTION | input | Direction control: when high, data flows from bus A to bus B; when low, data flows from bus B to bus A (per the function table). |
| 2 | A1 | bidirectional | Bus A data port bit 1; Vin and Vout must be kept within GND to VCC, and unused I/O must be tied to GND or VCC if used as an input. |
| 3 | A2 | bidirectional | Bus A data port bit 2; Vin and Vout must be kept within GND to VCC, and unused I/O must be tied to GND or VCC if used as an input. |
| 4 | A3 | bidirectional | Bus A data port bit 3; Vin and Vout must be kept within GND to VCC, and unused I/O must be tied to GND or VCC if used as an input. |
| 5 | A4 | bidirectional | Bus A data port bit 4; Vin and Vout must be kept within GND to VCC, and unused I/O must be tied to GND or VCC if used as an input. |
| 6 | A5 | bidirectional | Bus A data port bit 5; Vin and Vout must be kept within GND to VCC, and unused I/O must be tied to GND or VCC if used as an input. |
| 7 | A6 | bidirectional | Bus A data port bit 6; Vin and Vout must be kept within GND to VCC, and unused I/O must be tied to GND or VCC if used as an input. |
| 8 | A7 | bidirectional | Bus A data port bit 7; Vin and Vout must be kept within GND to VCC, and unused I/O must be tied to GND or VCC if used as an input. |
| 9 | A8 | bidirectional | Bus A data port bit 8; Vin and Vout must be kept within GND to VCC, and unused I/O must be tied to GND or VCC if used as an input. |
| 10 | GND | power_in | Ground reference for the device; all voltages are referenced to this pin. |
| 11 | B8 | bidirectional | Bus B data port bit 8; Vin and Vout must be kept within GND to VCC, and unused I/O must be tied to GND or VCC if used as an input. |
| 12 | B7 | bidirectional | Bus B data port bit 7; Vin and Vout must be kept within GND to VCC, and unused I/O must be tied to GND or VCC if used as an input. |
| 13 | B6 | bidirectional | Bus B data port bit 6; Vin and Vout must be kept within GND to VCC, and unused I/O must be tied to GND or VCC if used as an input. |
| 14 | B5 | bidirectional | Bus B data port bit 5; Vin and Vout must be kept within GND to VCC, and unused I/O must be tied to GND or VCC if used as an input. |
| 15 | B4 | bidirectional | Bus B data port bit 4; Vin and Vout must be kept within GND to VCC, and unused I/O must be tied to GND or VCC if used as an input. |
| 16 | B3 | bidirectional | Bus B data port bit 3; Vin and Vout must be kept within GND to VCC, and unused I/O must be tied to GND or VCC if used as an input. |
| 17 | B2 | bidirectional | Bus B data port bit 2; Vin and Vout must be kept within GND to VCC, and unused I/O must be tied to GND or VCC if used as an input. |
| 18 | B1 | bidirectional | Bus B data port bit 1; Vin and Vout must be kept within GND to VCC, and unused I/O must be tied to GND or VCC if used as an input. |
| 19 | OUTPUT ENABLE | input | Active-low output enable; when high, both data ports are isolated and placed in the high-impedance state. |
| 20 | VCC | power_in | Positive supply, specified at 4.5 V to 5.5 V with respect to GND (recommended operating conditions). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | TSSOP-20 |
| Category | Logic ICs |
| Pins | 20 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| DC Supply Voltage (Referenced to GND) | VCC | 4.5 | 5.5 | V | 3 | ||
| DC Input Voltage, Output Voltage (Referenced to GND) | Vin, Vout | 0 | V | Max is VCC as printed | 3 | ||
| Operating Temperature, All Package Types | TA | -55 | 125 | °C | 3 | ||
| Input Rise and Fall Time | tr, tf | 0 | 500 | ns | Figure 1 | 3 | |
| DC Supply Voltage (Referenced to GND) | VCC | -0.5 | 7 | V | 3 | ||
| DC Input Voltage (Referenced to GND) | Vin | -0.5 | V | Max printed as VCC + 0.5 | 3 | ||
| DC Output Voltage (Referenced to GND) | Vout | -0.5 | V | Max printed as VCC + 0.5 | 3 | ||
| DC Input Current, per Pin | Iin | -20 | 20 | mA | Per pin | 3 | |
| DC Output Current, per Pin | Iout | -35 | 35 | mA | Per pin | 3 | |
| DC Supply Current, VCC and GND Pins | ICC | -75 | 75 | mA | VCC and GND pins | 3 | |
| Power Dissipation in Still Air, TSSOP Package | PD | 450 | mW | Still air, TSSOP package | 3 | ||
| Storage Temperature | Tstg | -65 | 150 | °C | 3 | ||
| Lead Temperature | TL | 260 | °C | 1 mm from case for 10 s (PDIP, SOIC, SSOP or TSSOP package) | 3 | ||
| Minimum High-Level Input Voltage | VIH | 2 | V | Vout = 0.1 V or VCC, 0.1 V; /Iout/ ≤ 20 µA; VCC = 4.5 V and 5.5 V; -55 to 125 °C | 4 | ||
| Maximum Low-Level Input Voltage | VIL | 0.8 | V | Vout = 0.1 V or VCC, 0.1 V; /Iout/ ≤ 20 µA; VCC = 4.5 V and 5.5 V; -55 to 125 °C | 4 | ||
| Minimum High-Level Output Voltage | VOH | 4.4 | V | Vin = VIH or VIL; /Iout/ ≤ 20 µA; VCC = 4.5 V; -55 to 125 °C | 4 | ||
| Minimum High-Level Output Voltage | VOH | 5.4 | V | Vin = VIH or VIL; /Iout/ ≤ 20 µA; VCC = 5.5 V; -55 to 125 °C | 4 | ||
| Minimum High-Level Output Voltage | VOH | 3.98 | V | Vin = VIH or VIL; /Iout/ ≤ 6.0 mA; VCC = 4.5 V; -55 to 25 °C | 4 | ||
| Minimum High-Level Output Voltage | VOH | 3.84 | V | Vin = VIH or VIL; /Iout/ ≤ 6.0 mA; VCC = 4.5 V; 85 °C | 4 | ||
| Minimum High-Level Output Voltage | VOH | 3.7 | V | Vin = VIH or VIL; /Iout/ ≤ 6.0 mA; VCC = 4.5 V; 125 °C | 4 | ||
| Maximum Low-Level Output Voltage | VOL | 0.1 | V | Vin = VIH or VIL; /Iout/ ≤ 20 µA; VCC = 4.5 V; -55 to 125 °C | 4 | ||
| Maximum Low-Level Output Voltage | VOL | 0.26 | V | Vin = VIH or VIL; /Iout/ ≤ 6.0 mA; VCC = 4.5 V; -55 to 25 °C | 4 | ||
| Maximum Low-Level Output Voltage | VOL | 0.33 | V | Vin = VIH or VIL; /Iout/ ≤ 6.0 mA; VCC = 4.5 V; 85 °C | 4 | ||
| Maximum Low-Level Output Voltage | VOL | 0.4 | V | Vin = VIH or VIL; /Iout/ ≤ 6.0 mA; VCC = 4.5 V; 125 °C | 4 | ||
| Maximum Input Leakage Current | Iin | -0.1 | 0.1 | µA | Vin = VCC or GND, Pins 1 or 19; VCC = 5.5 V; -55 to 25 °C | 4 | |
| Maximum Input Leakage Current | Iin | -1 | 1 | µA | Vin = VCC or GND, Pins 1 or 19; VCC = 5.5 V; 85 °C | 4 | |
| Maximum Quiescent Supply Current (per Package) | ICC | 4 | µA | Vin = VCC or GND; Iout = 0 A; VCC = 5.5 V; -55 to 25 °C | 4 | ||
| Maximum Quiescent Supply Current (per Package) | ICC | 40 | µA | Vin = VCC or GND; Iout = 0 A; VCC = 5.5 V; 85 °C | 4 | ||
| Maximum Quiescent Supply Current (per Package) | ICC | 160 | µA | Vin = VCC or GND; Iout = 0 A; VCC = 5.5 V; 125 °C | 4 | ||
| Maximum Three-State Leakage Current | IOZ | -0.5 | 0.5 | µA | Output in high-impedance state; Vin = VIL or VIH; Vout = VCC or GND, I/O pins; VCC = 5.5 V; -55 to 25 °C | 4 | |
| Maximum Three-State Leakage Current | IOZ | -5 | 5 | µA | Output in high-impedance state; Vin = VIL or VIH; Vout = VCC or GND, I/O pins; VCC = 5.5 V; 85 °C | 4 | |
| Maximum Three-State Leakage Current | IOZ | -10 | 10 | µA | Output in high-impedance state; Vin = VIL or VIH; Vout = VCC or GND, I/O pins; VCC = 5.5 V; 125 °C | 4 | |
| Additional Quiescent Supply Current | ICC | 2.9 | mA | Vin = 2.4 V, any one input; Vin = VCC or GND, other inputs; Iout = 0 A; VCC = 5.5 V; ≥ -55 °C | 4 | ||
| Additional Quiescent Supply Current | ICC | 2.4 | mA | Vin = 2.4 V, any one input; Vin = VCC or GND, other inputs; Iout = 0 A; VCC = 5.5 V; 25 to 125 °C | 4 | ||
| Maximum Propagation Delay, A to B or B to A | tPLH, tPHL | 22 | ns | VCC = 5.0 V ± 10%, CL = 50 pF, tr = tf = 6.0 ns; Figures 2 and 4; -55 to 25 °C | 4 | ||
| Maximum Propagation Delay, A to B or B to A | tPLH, tPHL | 28 | ns | VCC = 5.0 V ± 10%, CL = 50 pF, tr = tf = 6.0 ns; Figures 2 and 4; 85 °C | 4 | ||
| Maximum Propagation Delay, A to B or B to A | tPLH, tPHL | 33 | ns | VCC = 5.0 V ± 10%, CL = 50 pF, tr = tf = 6.0 ns; Figures 2 and 4; 125 °C | 4 | ||
| Maximum Propagation Delay, Direction or Output Enable to A or B | tPLZ, tPHZ | 30 | ns | VCC = 5.0 V ± 10%, CL = 50 pF, tr = tf = 6.0 ns; Figures 3 and 5; -55 to 25 °C | 4 | ||
| Maximum Propagation Delay, Direction or Output Enable to A or B | tPLZ, tPHZ | 36 | ns | VCC = 5.0 V ± 10%, CL = 50 pF, tr = tf = 6.0 ns; Figures 3 and 5; 85 °C | 4 | ||
| Maximum Propagation Delay, Direction or Output Enable to A or B | tPLZ, tPHZ | 42 | ns | VCC = 5.0 V ± 10%, CL = 50 pF, tr = tf = 6.0 ns; Figures 3 and 5; 125 °C | 4 | ||
| Maximum Propagation Delay, Output Enable to A or B | tPZL, tPZH | 30 | ns | VCC = 5.0 V ± 10%, CL = 50 pF, tr = tf = 6.0 ns; Figures 3 and 5; -55 to 25 °C | 4 | ||
| Maximum Propagation Delay, Output Enable to A or B | tPZL, tPZH | 36 | ns | VCC = 5.0 V ± 10%, CL = 50 pF, tr = tf = 6.0 ns; Figures 3 and 5; 85 °C | 4 | ||
| Maximum Propagation Delay, Output Enable to A or B | tPZL, tPZH | 42 | ns | VCC = 5.0 V ± 10%, CL = 50 pF, tr = tf = 6.0 ns; Figures 3 and 5; 125 °C | 4 | ||
| Maximum Output Transition Time, any Output | tTLH, tTHL | 12 | ns | VCC = 5.0 V ± 10%, CL = 50 pF, tr = tf = 6.0 ns; Figures 2 and 4; -55 to 25 °C | 4 | ||
| Maximum Output Transition Time, any Output | tTLH, tTHL | 15 | ns | VCC = 5.0 V ± 10%, CL = 50 pF, tr = tf = 6.0 ns; Figures 2 and 4; 85 °C | 4 | ||
| Maximum Output Transition Time, any Output | tTLH, tTHL | 18 | ns | VCC = 5.0 V ± 10%, CL = 50 pF, tr = tf = 6.0 ns; Figures 2 and 4; 125 °C | 4 | ||
| Maximum Input Capacitance | Cin | 10 | pF | Pin 1 or 19; all temperature ranges | 4 | ||
| Maximum Three-State I/O Capacitance (I/O in High-Impedance State) | Cout | 15 | pF | I/O in high-impedance state; all temperature ranges | 4 |
CAD (KiCad official)
- Symbol:
MC74HCT245ADTG - Footprint:
Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm - 3D model: TSSOP-20 (KiCad packages3D, STEP)
- 3D model files:
mc74hct245adtg-etched.step/mc74hct245adtg-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mc74hct245adtg.step/mc74hct245adtg.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: onsemi datasheet (10 pp, sha256
49e7359a01dcc594, retrieved 2026-10-29, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).