MC74HCT132ADTR2G

{
  "slug": "mc74hct132adtr2g",
  "version": "0.1.0",
  "type": "component",
  "description": "onsemi Logic Gates, TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
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    "logic",
    "mc74hct132adtr2g",
    "factory-2.0.0",
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  "component": {
    "mpn": "MC74HCT132ADTR2G",
    "manufacturer": "onsemi",
    "package": "TSSOP-14",
    "pin_count": 14,
    "category": "Logic",
    "subcategory": "Logic Gates",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588930542347956224",
    "parts": {
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    },
    "distributor_links": {
      "lcsc": "C904060",
      "digikey": "MC74HCT132ADTR2GOSTR-ND",
      "mouser": "863-MC74HCT132ADTR2G"
    },
    "distributor_check": {
      "checked_at": "2026-10-19T04:26:33Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "MC74HCT132ADTR2GOSTR-ND",
        "status": "found",
        "lifecycle": "Active"
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      "mouser": {
        "pn": "863-MC74HCT132ADTR2G",
        "status": "found"
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    "pins": [
      {
        "number": "1",
        "name": "A1",
        "type": "input",
        "description": "Input A of NAND gate 1; Schmitt-trigger input, and unused inputs must not be left open and must be tied to a valid high or low logic level."
      },
      {
        "number": "2",
        "name": "B1",
        "type": "input",
        "description": "Input B of NAND gate 1; Schmitt-trigger input, and unused inputs must not be left open and must be tied to a valid high or low logic level."
      },
      {
        "number": "3",
        "name": "Y1",
        "type": "output",
        "description": "Output of NAND gate 1 (Y = A·B); output drives up to 10 LSTTL loads and, with input voltage limits of 0 to VCC, has a maximum DC output current of 25 mA per pin."
      },
      {
        "number": "4",
        "name": "A2",
        "type": "input",
        "description": "Input A of NAND gate 2; Schmitt-trigger input, and unused inputs must not be left open and must be tied to a valid high or low logic level."
      },
      {
        "number": "5",
        "name": "B2",
        "type": "input",
        "description": "Input B of NAND gate 2; Schmitt-trigger input, and unused inputs must not be left open and must be tied to a valid high or low logic level."
      },
      {
        "number": "6",
        "name": "Y2",
        "type": "output",
        "description": "Output of NAND gate 2 (Y = A·B); output drives up to 10 LSTTL loads and has a maximum DC output current of 25 mA per pin."
      },
      {
        "number": "7",
        "name": "GND",
        "type": "power_in",
        "description": "Ground reference for the device; all voltages are referenced to GND, with VCC of 2.0 to 6.0 V recommended."
      },
      {
        "number": "8",
        "name": "Y3",
        "type": "output",
        "description": "Output of NAND gate 3 (Y = A·B); output drives up to 10 LSTTL loads and has a maximum DC output current of 25 mA per pin."
      },
      {
        "number": "9",
        "name": "A3",
        "type": "input",
        "description": "Input A of NAND gate 3; Schmitt-trigger input, and unused inputs must not be left open and must be tied to a valid high or low logic level."
      },
      {
        "number": "10",
        "name": "B3",
        "type": "input",
        "description": "Input B of NAND gate 3; Schmitt-trigger input, and unused inputs must not be left open and must be tied to a valid high or low logic level."
      },
      {
        "number": "11",
        "name": "Y4",
        "type": "output",
        "description": "Output of NAND gate 4 (Y = A·B); output drives up to 10 LSTTL loads and has a maximum DC output current of 25 mA per pin."
      },
      {
        "number": "12",
        "name": "A4",
        "type": "input",
        "description": "Input A of NAND gate 4; Schmitt-trigger input, and unused inputs must not be left open and must be tied to a valid high or low logic level."
      },
      {
        "number": "13",
        "name": "B4",
        "type": "input",
        "description": "Input B of NAND gate 4; Schmitt-trigger input, and unused inputs must not be left open and must be tied to a valid high or low logic level."
      },
      {
        "number": "14",
        "name": "VCC",
        "type": "power_in",
        "description": "Positive supply; operating range 2.0 to 6.0 V referenced to GND, with absolute maximum of 7.0 V."
      }
    ],
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        "primary_model": "claude-haiku-5-5",
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        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The Figure 1 pin-assignment text in the extracted datasheet is scrambled, so the TSSOP-14 pin number; The datasheet does not state a separate pin-by-pin electrical limit for each pin; the per-pin descri"
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        "cost_usd": 0.0597,
        "at": "2026-10-19T04:26:18"
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        "pages": 9,
        "sha256": "e8a59d2445bfc45e",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 14,
        "described": 14,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
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}