component
MC74HC390ADTR2G
Public Made by Adomby adom
onsemi Counters, Dividers, TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownMC74HC390ADTR2G
onsemi · Counters, Dividers · TSSOP-16
MC74HC390ADTR2G from onsemi, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CLOCK Aa | input | Clock A input to the ÷2 counter of counter a; internal flip-flops toggle on high-to-low transitions of this input, with a minimum pulse width of 75 ns at VCC = 2.0 V. |
| 2 | RESET a | input | Asynchronous reset for counter a; a high level prevents counting, resets the internal flip-flops and forces QAa through QDa low. |
| 3 | QAa | output | Output of the ÷2 counter in counter a; QA is the least significant bit when connected for BCD output. |
| 4 | CLOCK Ba | input | Clock B input to the ÷5 counter in counter a; internal flip-flops toggle on high-to-low transitions of the clock input. |
| 5 | QBa | output | Output of the ÷5 counter in counter a; QB is the least significant bit when operating in bi-quinary mode. |
| 6 | QCa | output | Output of the ÷5 counter in counter a. |
| 7 | QDa | output | Output of the ÷5 counter in counter a; QD is the most significant bit. |
| 8 | GND | power_in | Device ground; all voltages are referenced to GND, and Vin and Vout must stay within GND to VCC. |
| 9 | QDb | output | Output of the ÷5 counter in counter b; QD is the most significant bit. |
| 10 | QCb | output | Output of the ÷5 counter in counter b. |
| 11 | QBb | output | Output of the ÷5 counter in counter b; QB is the least significant bit when operating in bi-quinary mode. |
| 12 | CLOCK Bb | input | Clock B input to the ÷5 counter in counter b; internal flip-flops toggle on high-to-low transitions of the clock input. |
| 13 | QAb | output | Output of the ÷2 counter in counter b; QA is the least significant bit when connected for BCD output. |
| 14 | RESET b | input | Asynchronous reset for counter b; a high level prevents counting, resets the internal flip-flops and forces QAb through QDb low. |
| 15 | CLOCK Ab | input | Clock A input to the ÷2 counter of counter b; internal flip-flops toggle on high-to-low transitions of this input. |
| 16 | VCC | power_in | Positive supply; recommended DC supply voltage is 2.0 V to 6.0 V referenced to GND. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | TSSOP-16 |
| Category | Logic |
| Pins | 16 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| DC Supply Voltage (Referenced to GND) | VCC | 2 | 6 | V | Referenced to GND | 2 | |
| DC Input Voltage, Output Voltage (Referenced to GND) | Vin, Vout | 0 | V | Maximum printed as VCC | 2 | ||
| Operating Temperature, All Package Types | TA | -55 | 125 | C | 2 | ||
| Input Rise and Fall Time | tr, tf | 0 | 1000 | ns | VCC = 2.0 V (Figure 1) | 2 | |
| Input Rise and Fall Time | tr, tf | 0 | 600 | ns | VCC = 3.0 V (Figure 1) | 2 | |
| Input Rise and Fall Time | tr, tf | 0 | 500 | ns | VCC = 4.5 V (Figure 1) | 2 | |
| Input Rise and Fall Time | tr, tf | 0 | 400 | ns | VCC = 6.0 V (Figure 1) | 2 | |
| DC Supply Voltage (Referenced to GND) | VCC | -0.5 | 7 | V | 2 | ||
| DC Input Voltage (Referenced to GND) | Vin | -0.5 | V | Maximum printed as VCC + 0.5 | 2 | ||
| DC Output Voltage (Referenced to GND) | Vout | -0.5 | V | Maximum printed as VCC + 0.5 | 2 | ||
| DC Input Current, per Pin | Iin | -20 | 20 | mA | 2 | ||
| DC Output Current, per Pin | Iout | -25 | 25 | mA | 2 | ||
| DC Supply Current, VCC and GND Pins | ICC | -50 | 50 | mA | 2 | ||
| Power Dissipation in Still Air | PD | 450 | mW | TSSOP package | 2 | ||
| Storage Temperature | Tstg | -65 | 150 | C | 2 | ||
| Lead Temperature, 1 mm from Case for 10 Seconds | TL | 260 | C | SOIC or TSSOP package | 2 | ||
| Minimum High-Level Input Voltage | VIH | 1.5 | V | VCC = 2.0 V; Vout = 0.1 V or VCC - 0.1 V; /Iout/ ≤ 20 µA; 125 C column | 2 | ||
| Minimum High-Level Input Voltage | VIH | 2.1 | V | VCC = 3.0 V; Vout = 0.1 V or VCC - 0.1 V; /Iout/ ≤ 20 µA; 125 C column | 2 | ||
| Minimum High-Level Input Voltage | VIH | 3.15 | V | VCC = 4.5 V; Vout = 0.1 V or VCC - 0.1 V; /Iout/ ≤ 20 µA; 125 C column | 2 | ||
| Minimum High-Level Input Voltage | VIH | 4.2 | V | VCC = 6.0 V; Vout = 0.1 V or VCC - 0.1 V; /Iout/ ≤ 20 µA; 125 C column | 2 | ||
| Maximum Low-Level Input Voltage | VIL | 0.5 | V | VCC = 2.0 V; Vout = 0.1 V or VCC - 0.1 V; /Iout/ ≤ 20 µA; 125 C column | 2 | ||
| Maximum Low-Level Input Voltage | VIL | 0.9 | V | VCC = 3.0 V; Vout = 0.1 V or VCC - 0.1 V; /Iout/ ≤ 20 µA; 125 C column | 2 | ||
| Maximum Low-Level Input Voltage | VIL | 1.35 | V | VCC = 4.5 V; Vout = 0.1 V or VCC - 0.1 V; /Iout/ ≤ 20 µA; 125 C column | 2 | ||
| Maximum Low-Level Input Voltage | VIL | 1.8 | V | VCC = 6.0 V; Vout = 0.1 V or VCC - 0.1 V; /Iout/ ≤ 20 µA; 125 C column | 2 | ||
| Minimum High-Level Output Voltage | VOH | 1.9 | V | VCC = 2.0 V; Vin = VIH or VIL; /Iout/ ≤ 20 µA; 125 C column | 2 | ||
| Minimum High-Level Output Voltage | VOH | 4.4 | V | VCC = 4.5 V; Vin = VIH or VIL; /Iout/ ≤ 20 µA; 125 C column | 2 | ||
| Minimum High-Level Output Voltage | VOH | 5.9 | V | VCC = 6.0 V; Vin = VIH or VIL; /Iout/ ≤ 20 µA; 125 C column | 2 | ||
| Minimum High-Level Output Voltage | VOH | 2.2 | V | VCC = 3.0 V; Vin = VIH or VIL; /Iout/ ≤ 2.4 mA; 125 C column | 2 | ||
| Minimum High-Level Output Voltage | VOH | 3.7 | V | VCC = 4.5 V; Vin = VIH or VIL; /Iout/ ≤ 4.0 mA; 125 C column | 2 | ||
| Minimum High-Level Output Voltage | VOH | 5.2 | V | VCC = 6.0 V; Vin = VIH or VIL; /Iout/ ≤ 5.2 mA; 125 C column | 2 | ||
| Maximum Low-Level Output Voltage | VOL | 0.1 | V | VCC = 2.0 V; Vin = VIH or VIL; /Iout/ ≤ 20 µA; 125 C column | 2 | ||
| Maximum Low-Level Output Voltage | VOL | 0.4 | V | VCC = 3.0 V; Vin = VIH or VIL; /Iout/ ≤ 2.4 mA; 125 C column | 2 | ||
| Maximum Input Leakage Current | Iin | -1 | 1 | µA | VCC = 6.0 V; Vin = VCC or GND; 125 C column | 3 | |
| Maximum Quiescent Supply Current (per Package) | ICC | 160 | µA | VCC = 6.0 V; Vin = VCC or GND; Iout = 0 µA; 125 C column | 3 | ||
| Maximum Input Capacitance | Cin | 10 | pF | 3 | |||
| Maximum Clock Frequency (50% Duty Cycle) | fmax | 8 | MHz | VCC = 2.0 V; CL = 50 pF, tr = tf = 6 ns; Figures 1 and 3; 125 C column | 3 | ||
| Maximum Clock Frequency (50% Duty Cycle) | fmax | 12 | MHz | VCC = 3.0 V; CL = 50 pF, tr = tf = 6 ns; Figures 1 and 3; 125 C column | 3 | ||
| Maximum Clock Frequency (50% Duty Cycle) | fmax | 25 | MHz | VCC = 4.5 V; CL = 50 pF, tr = tf = 6 ns; Figures 1 and 3; 125 C column | 3 | ||
| Maximum Clock Frequency (50% Duty Cycle) | fmax | 40 | MHz | VCC = 6.0 V; CL = 50 pF, tr = tf = 6 ns; Figures 1 and 3; 125 C column | 3 | ||
| Maximum Propagation Delay, Clock A to QA | tPLH, tPHL | 90 | ns | VCC = 2.0 V; CL = 50 pF, tr = tf = 6 ns; Figures 1 and 3; 125 C column | 3 | ||
| Maximum Propagation Delay, Clock A to QA | tPLH, tPHL | 50 | ns | VCC = 3.0 V; CL = 50 pF, tr = tf = 6 ns; Figures 1 and 3; 125 C column | 3 | ||
| Maximum Propagation Delay, Clock A to QA | tPLH, tPHL | 36 | ns | VCC = 4.5 V; CL = 50 pF, tr = tf = 6 ns; Figures 1 and 3; 125 C column | 3 | ||
| Maximum Propagation Delay, Clock A to QA | tPLH, tPHL | 31 | ns | VCC = 6.0 V; CL = 50 pF, tr = tf = 6 ns; Figures 1 and 3; 125 C column | 3 | ||
| Maximum Propagation Delay, Clock B to QB | tPLH, tPHL | 90 | ns | VCC = 2.0 V; CL = 50 pF, tr = tf = 6 ns; Figures 1 and 3; 125 C column | 3 | ||
| Maximum Propagation Delay, Clock B to QB | tPLH, tPHL | 50 | ns | VCC = 3.0 V; CL = 50 pF, tr = tf = 6 ns; Figures 1 and 3; 125 C column | 3 | ||
| Maximum Propagation Delay, Clock B to QB | tPLH, tPHL | 39 | ns | VCC = 4.5 V; CL = 50 pF, tr = tf = 6 ns; Figures 1 and 3; 125 C column | 3 | ||
| Maximum Propagation Delay, Clock B to QB | tPLH, tPHL | 33 | ns | VCC = 6.0 V; CL = 50 pF, tr = tf = 6 ns; Figures 1 and 3; 125 C column | 3 | ||
| Maximum Propagation Delay, Reset to any Q | tPHL | 110 | ns | VCC = 2.0 V; CL = 50 pF, tr = tf = 6 ns; Figures 2 and 3; 125 C column | 3 | ||
| Maximum Propagation Delay, Reset to any Q | tPHL | 75 | ns | VCC = 3.0 V; CL = 50 pF, tr = tf = 6 ns; Figures 2 and 3; 125 C column | 3 | ||
| Maximum Propagation Delay, Reset to any Q | tPHL | 44 | ns | VCC = 4.5 V; CL = 50 pF, tr = tf = 6 ns; Figures 2 and 3; 125 C column | 3 | ||
| Maximum Propagation Delay, Reset to any Q | tPHL | 39 | ns | VCC = 6.0 V; CL = 50 pF, tr = tf = 6 ns; Figures 2 and 3; 125 C column | 3 | ||
| Maximum Output Transition Time, Any Output | tTLH, tTHL | 110 | ns | VCC = 2.0 V; CL = 50 pF, tr = tf = 6 ns; Figures 1 and 3; 125 C column | 3 | ||
| Maximum Output Transition Time, Any Output | tTLH, tTHL | 36 | ns | VCC = 3.0 V; CL = 50 pF, tr = tf = 6 ns; Figures 1 and 3; 125 C column | 3 | ||
| Maximum Output Transition Time, Any Output | tTLH, tTHL | 22 | ns | VCC = 4.5 V; CL = 50 pF, tr = tf = 6 ns; Figures 1 and 3; 125 C column | 3 | ||
| Maximum Output Transition Time, Any Output | tTLH, tTHL | 19 | ns | VCC = 6.0 V; CL = 50 pF, tr = tf = 6 ns; Figures 1 and 3; 125 C column | 3 |
CAD (KiCad official)
- Symbol:
MC74HC390ADTR2G - Footprint:
Package_SO:TSSOP-16_4.4x5mm_P0.65mm - 3D model: TSSOP-16 (KiCad packages3D, STEP)
- 3D model files:
mc74hc390adtr2g-etched.step/mc74hc390adtr2g-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mc74hc390adtr2g.step/mc74hc390adtr2g.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: onsemi datasheet (9 pp, sha256
81e186d6924ad7e5, retrieved 2026-10-21, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).