component
MC74HC32ADG
Public Made by Adomby adom
onsemi Flip Flops, SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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MC74HC32ADG
onsemi · Flip Flops · SOIC-14
MC74HC32ADG from onsemi, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A1 | input | Gate 1 input A; unused inputs must be tied to GND or VCC. |
| 2 | B1 | input | Gate 1 input B; unused inputs must be tied to GND or VCC. |
| 3 | Y1 | output | Gate 1 output (Y = A+B), drives 10 LSTTL loads; unused outputs must be left open. |
| 4 | A2 | input | Gate 2 input A; unused inputs must be tied to GND or VCC. |
| 5 | B2 | input | Gate 2 input B; unused inputs must be tied to GND or VCC. |
| 6 | Y2 | output | Gate 2 output (Y = A+B), drives 10 LSTTL loads; unused outputs must be left open. |
| 7 | GND | power_in | Ground pin (0 V reference). |
| 8 | Y3 | output | Gate 3 output (Y = A+B), drives 10 LSTTL loads; unused outputs must be left open. |
| 9 | A3 | input | Gate 3 input A; unused inputs must be tied to GND or VCC. |
| 10 | B3 | input | Gate 3 input B; unused inputs must be tied to GND or VCC. |
| 11 | Y4 | output | Gate 4 output (Y = A+B), drives 10 LSTTL loads; unused outputs must be left open. |
| 12 | A4 | input | Gate 4 input A; unused inputs must be tied to GND or VCC. |
| 13 | B4 | input | Gate 4 input B; unused inputs must be tied to GND or VCC. |
| 14 | VCC | power_in | Positive supply, 2.0 to 6.0 V for MC74HC32A (absolute max -0.5 to +6.5 V). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | SOIC-14 |
| Category | Logic ICs |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| DC Supply Voltage | VCC | 2 | 6 | V | MC74HC, referenced to GND | 2 | |
| DC Input/Output Voltage | VIN, VOUT | 0 | V | Max = VCC, referenced to GND | 2 | ||
| Operating Free-Air Temperature | TA | -55 | 125 | °C | MC74HC | 2 | |
| Input Rise or Fall Time | tr, tf | 0 | 1000 | ns | VCC = 2.0 V | 2 | |
| Input Rise or Fall Time | tr, tf | 0 | 500 | ns | VCC = 4.5 V | 2 | |
| Input Rise or Fall Time | tr, tf | 0 | 400 | ns | VCC = 6.0 V | 2 | |
| DC Supply Voltage | VCC | -0.5 | 6.5 | V | 2 | ||
| DC Input Voltage | VIN | -0.5 | V | -0.5 to VCC + 0.5 V | 2 | ||
| DC Output Voltage | VOUT | -0.5 | V | -0.5 to VCC + 0.5 V | 2 | ||
| DC Input Current, per Pin | IIN | -20 | 20 | mA | 2 | ||
| DC Output Current, per Pin | IOUT | -25 | 25 | mA | 2 | ||
| DC Supply Current, VCC and GND Pins | ICC | -50 | 50 | mA | 2 | ||
| Input Clamp Current | IIK | -20 | 20 | mA | VIN < 0 or VIN > VCC | 2 | |
| Output Clamp Current | IOK | -20 | 20 | mA | VOUT < 0 or VOUT > VCC | 2 | |
| Storage Temperature | TSTG | -65 | 150 | °C | 2 | ||
| Lead Temperature | TL | 260 | °C | 1 mm from case for 10 seconds | 2 | ||
| Junction Temperature Under Bias | TJ | -150 | 150 | °C | 2 | ||
| Thermal Resistance | θJA | 116 | °C/W | SOIC-14 NB | 2 | ||
| Power Dissipation in Still Air | PD | 1077 | mW | SOIC-14 NB, at 25 °C | 2 | ||
| ESD Withstand Voltage, Human Body Model | VESD | 2000 | V | HBM, >2000 | 2 | ||
| Minimum High-Level Input Voltage | VIH | 1.5 | V | VCC = 2.0 V, Vout = 0.1V or VCC −0.1V, /Iout/ ≤ 20µA, −55 to 25 °C | 3 | ||
| Minimum High-Level Input Voltage | VIH | 2.1 | V | VCC = 3.0 V, Vout = 0.1V or VCC −0.1V, /Iout/ ≤ 20µA, −55 to 25 °C | 3 | ||
| Minimum High-Level Input Voltage | VIH | 3.15 | V | VCC = 4.5 V, Vout = 0.1V or VCC −0.1V, /Iout/ ≤ 20µA, −55 to 25 °C | 3 | ||
| Minimum High-Level Input Voltage | VIH | 4.2 | V | VCC = 6.0 V, Vout = 0.1V or VCC −0.1V, /Iout/ ≤ 20µA, −55 to 25 °C | 3 | ||
| Maximum Low-Level Input Voltage | VIL | 0.5 | V | VCC = 2.0 V, Vout = 0.1V or VCC − 0.1V, /Iout/ ≤ 20µA, −55 to 25 °C | 3 | ||
| Maximum Low-Level Input Voltage | VIL | 0.9 | V | VCC = 3.0 V, Vout = 0.1V or VCC − 0.1V, /Iout/ ≤ 20µA, −55 to 25 °C | 3 | ||
| Maximum Low-Level Input Voltage | VIL | 1.35 | V | VCC = 4.5 V, Vout = 0.1V or VCC − 0.1V, /Iout/ ≤ 20µA, −55 to 25 °C | 3 | ||
| Maximum Low-Level Input Voltage | VIL | 1.8 | V | VCC = 6.0 V, Vout = 0.1V or VCC − 0.1V, /Iout/ ≤ 20µA, −55 to 25 °C | 3 | ||
| Minimum High-Level Output Voltage | VOH | 1.9 | V | VCC = 2.0 V, Vin = VIH or VIL, /Iout/ ≤ 20µA, −55 to 25 °C | 3 | ||
| Minimum High-Level Output Voltage | VOH | 4.4 | V | VCC = 4.5 V, Vin = VIH or VIL, /Iout/ ≤ 20µA, −55 to 25 °C | 3 | ||
| Minimum High-Level Output Voltage | VOH | 5.9 | V | VCC = 6.0 V, Vin = VIH or VIL, /Iout/ ≤ 20µA, −55 to 25 °C | 3 | ||
| Minimum High-Level Output Voltage | VOH | 2.48 | V | VCC = 3.0 V, Vin = VIH or VIL, /Iout/ ≤ 2.4mA, −55 to 25 °C | 3 | ||
| Minimum High-Level Output Voltage | VOH | 3.98 | V | VCC = 4.5 V, Vin = VIH or VIL, /Iout/ ≤ 4.0mA, −55 to 25 °C | 3 | ||
| Minimum High-Level Output Voltage | VOH | 5.48 | V | VCC = 6.0 V, Vin = VIH or VIL, /Iout/ ≤ 5.2mA, −55 to 25 °C | 3 | ||
| Maximum Low-Level Output Voltage | VOL | 0.1 | V | VCC = 2.0 V, Vin = VIH or VIL, /Iout/ ≤ 20µA, −55 to 25 °C | 3 | ||
| Maximum Low-Level Output Voltage | VOL | 0.26 | V | VCC = 3.0 V, Vin = VIH or VIL, /Iout/ ≤ 2.4mA, −55 to 25 °C | 3 | ||
| Maximum Input Leakage Current | Iin | -0.1 | 0.1 | µA | Vin = VCC or GND, VCC = 6.0 V, −55 to 25 °C | 3 | |
| Maximum Input Leakage Current | Iin | -1 | 1 | µA | Vin = VCC or GND, VCC = 6.0 V, ≤85 °C | 3 | |
| Maximum Quiescent Supply Current (per Package) | ICC | 1 | µA | Vin = VCC or GND, Iout = 0µA, VCC = 6.0 V, −55 to 25 °C | 3 | ||
| Maximum Quiescent Supply Current (per Package) | ICC | 10 | µA | Vin = VCC or GND, Iout = 0µA, VCC = 6.0 V, ≤85 °C | 3 | ||
| Maximum Quiescent Supply Current (per Package) | ICC | 40 | µA | Vin = VCC or GND, Iout = 0µA, VCC = 6.0 V, ≤125 °C | 3 | ||
| Maximum Propagation Delay, (A or B) to Y | tPLH, tPHL | 75 | ns | VCC = 2.0 V, −55 to 25 °C | 3 | ||
| Maximum Propagation Delay, (A or B) to Y | tPLH, tPHL | 30 | ns | VCC = 3.0 V, −55 to 25 °C | 3 | ||
| Maximum Propagation Delay, (A or B) to Y | tPLH, tPHL | 15 | ns | VCC = 4.5 V, −55 to 25 °C | 3 | ||
| Maximum Propagation Delay, (A or B) to Y | tPLH, tPHL | 13 | ns | VCC = 6.0 V, −55 to 25 °C | 3 | ||
| Maximum Output Transition Time, Any Output | tTLH, tTHL | 75 | ns | VCC = 2.0 V, −55 to 25 °C | 3 | ||
| Maximum Output Transition Time, Any Output | tTLH, tTHL | 27 | ns | VCC = 3.0 V, −55 to 25 °C | 3 | ||
| Maximum Output Transition Time, Any Output | tTLH, tTHL | 15 | ns | VCC = 4.5 V, −55 to 25 °C | 3 | ||
| Maximum Output Transition Time, Any Output | tTLH, tTHL | 13 | ns | VCC = 6.0 V, −55 to 25 °C | 3 | ||
| Maximum Input Capacitance | Cin | 10 | pF | −55 to 25 °C | 3 | ||
| Power Dissipation Capacitance (Per Buffer) | CPD | 20 | pF | Typical @ 25 °C, VCC = 5.0 V, VEE = 0 V | 3 |
CAD (KiCad official)
- Symbol:
MC74HC32ADG - Footprint:
Package_SO:SOIC-14_3.9x8.7mm_P1.27mm - 3D model: SOIC-14 (KiCad packages3D, STEP)
- 3D model files:
mc74hc32adg-etched.step/mc74hc32adg-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mc74hc32adg.step/mc74hc32adg.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: onsemi datasheet (11 pp, sha256
a2a71019f03fc227, retrieved 2026-10-23, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).