component
MC74HC238ADTR2G
Public Made by Adomby adom
onsemi Signal Switches, Multiplexers, Decoders, TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownMC74HC238ADTR2G
onsemi · Signal Switches, Multiplexers, Decoders · TSSOP-16
MC74HC238ADTR2G from onsemi, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A0 | input | Address input that, when the chip is selected, determines which of the eight outputs is active. |
| 2 | A1 | input | Address input that, when the chip is selected, determines which of the eight outputs is active. |
| 3 | A2 | input | Address input that, when the chip is selected, determines which of the eight outputs is active. |
| 4 | CS2 | input | Active-low chip select input; the chip is selected only when CS2 is low together with CS1 high and CS3 low. |
| 5 | CS3 | input | Active-low chip select input; the chip is selected only when CS3 is low together with CS1 high and CS2 low. |
| 6 | CS1 | input | Active-high chip select input; the chip is selected only when CS1 is high together with CS2 and CS3 low, otherwise all outputs are held low. |
| 7 | Y7 | output | Active-high decoded output that goes high when addressed and the chip is selected, and remains low otherwise. |
| 8 | GND | power_in | Ground reference for all voltages referenced to GND in the datasheet. |
| 9 | Y6 | output | Active-high decoded output that goes high when addressed and the chip is selected, and remains low otherwise. |
| 10 | Y5 | output | Active-high decoded output that goes high when addressed and the chip is selected, and remains low otherwise. |
| 11 | Y4 | output | Active-high decoded output that goes high when addressed and the chip is selected, and remains low otherwise. |
| 12 | Y3 | output | Active-high decoded output that goes high when addressed and the chip is selected, and remains low otherwise. |
| 13 | Y2 | output | Active-high decoded output that goes high when addressed and the chip is selected, and remains low otherwise. |
| 14 | Y1 | output | Active-high decoded output that goes high when addressed and the chip is selected, and remains low otherwise. |
| 15 | Y0 | output | Active-high decoded output that goes high when addressed and the chip is selected, and remains low otherwise. |
| 16 | VCC | power_in | Positive supply pin; DC supply voltage is 2.0 V to 6.0 V referenced to GND. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | TSSOP-16 |
| Category | Logic |
| Pins | 16 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| DC Supply Voltage (Referenced to GND) | VCC | 2 | 6 | V | 3 | ||
| Operating Temperature, All Package Types | TA | -55 | 125 | °C | 3 | ||
| Input Rise and Fall Time | tr, tf | 0 | 1000 | ns | VCC = 2.0 V (Figure 2) | 3 | |
| Input Rise and Fall Time | tr, tf | 0 | 500 | ns | VCC = 4.5 V (Figure 2) | 3 | |
| Input Rise and Fall Time | tr, tf | 0 | 400 | ns | VCC = 6.0 V (Figure 2) | 3 | |
| DC Input Voltage, Output Voltage (Referenced to GND) | Vin, Vout | 0 | V | Referenced to GND; maximum printed as VCC | 3 | ||
| DC Supply Voltage (Referenced to GND) | VCC | -0.5 | 7 | V | Referenced to GND | 3 | |
| DC Input Voltage (Referenced to GND) | Vin | -0.5 | V | Referenced to GND; maximum printed as VCC + 0.5 V | 3 | ||
| DC Output Voltage (Referenced to GND) | Vout | -0.5 | V | Referenced to GND; maximum printed as VCC + 0.5 V | 3 | ||
| DC Input Current, per Pin | Iin | -20 | 20 | mA | 3 | ||
| DC Output Current, per Pin | Iout | -25 | 25 | mA | 3 | ||
| DC Supply Current, VCC and GND Pins | ICC | -50 | 50 | mA | 3 | ||
| Power Dissipation in Still Air, TSSOP Package | PD | 450 | mW | TSSOP package | 3 | ||
| Storage Temperature | Tstg | -65 | 150 | °C | 3 | ||
| Lead Temperature, 1 mm from Case for 10 Seconds | TL | 260 | °C | 1 mm from case for 10 seconds (SOIC or TSSOP package) | 3 | ||
| Minimum High-Level Input Voltage | VIH | 1.5 | V | VCC = 2.0 V; Vout = 0.1 V or VCC − 0.1 V; /Iout/ ≤ 20 µA; −55 to 125 °C | 4 | ||
| Minimum High-Level Input Voltage | VIH | 2.1 | V | VCC = 3.0 V; Vout = 0.1 V or VCC − 0.1 V; /Iout/ ≤ 20 µA; −55 to 125 °C | 4 | ||
| Minimum High-Level Input Voltage | VIH | 3.15 | V | VCC = 4.5 V; Vout = 0.1 V or VCC − 0.1 V; /Iout/ ≤ 20 µA; −55 to 125 °C | 4 | ||
| Minimum High-Level Input Voltage | VIH | 4.2 | V | VCC = 6.0 V; Vout = 0.1 V or VCC − 0.1 V; /Iout/ ≤ 20 µA; −55 to 125 °C | 4 | ||
| Maximum Low-Level Input Voltage | VIL | 0.5 | V | VCC = 2.0 V; Vout = 0.1 V or VCC − 0.1 V; /Iout/ ≤ 20 µA; −55 to 125 °C | 4 | ||
| Maximum Low-Level Input Voltage | VIL | 0.9 | V | VCC = 3.0 V; Vout = 0.1 V or VCC − 0.1 V; /Iout/ ≤ 20 µA; −55 to 125 °C | 4 | ||
| Maximum Low-Level Input Voltage | VIL | 1.35 | V | VCC = 4.5 V; Vout = 0.1 V or VCC − 0.1 V; /Iout/ ≤ 20 µA; −55 to 125 °C | 4 | ||
| Maximum Low-Level Input Voltage | VIL | 1.8 | V | VCC = 6.0 V; Vout = 0.1 V or VCC − 0.1 V; /Iout/ ≤ 20 µA; −55 to 125 °C | 4 | ||
| Minimum High-Level Output Voltage | VOH | 1.9 | V | VCC = 2.0 V; Vin = VIH or VIL; /Iout/ ≤ 20 µA | 4 | ||
| Minimum High-Level Output Voltage | VOH | 4.4 | V | VCC = 4.5 V; Vin = VIH or VIL; /Iout/ ≤ 20 µA | 4 | ||
| Minimum High-Level Output Voltage | VOH | 5.9 | V | VCC = 6.0 V; Vin = VIH or VIL; /Iout/ ≤ 20 µA | 4 | ||
| Minimum High-Level Output Voltage | VOH | 2.2 | V | VCC = 3.0 V; Vin = VIH or VIL; /Iout/ ≤ 2.4 mA | 4 | ||
| Minimum High-Level Output Voltage | VOH | 3.7 | V | VCC = 4.5 V; Vin = VIH or VIL; /Iout/ ≤ 4.0 mA | 4 | ||
| Minimum High-Level Output Voltage | VOH | 5.2 | V | VCC = 6.0 V; Vin = VIH or VIL; /Iout/ ≤ 5.2 mA | 4 | ||
| Maximum Low-Level Output Voltage | VOL | 0.1 | V | VCC = 2.0 V; Vin = VIH or VIL; /Iout/ ≤ 20 µA | 4 | ||
| Maximum Low-Level Output Voltage | VOL | 0.4 | V | VCC = 3.0 V; Vin = VIH or VIL; /Iout/ ≤ 2.4 mA | 4 | ||
| Maximum Input Leakage Current | Iin | -1 | 1 | µA | VCC = 6.0 V; Vin = VCC or GND; −55 to 125 °C | 4 | |
| Maximum Quiescent Supply Current (per Package) | ICC | 160 | µA | VCC = 6.0 V; Vin = VCC or GND; Iout = 0 µA; 125 °C column | 4 | ||
| Maximum Propagation Delay, Input A to Output Y | tPLH, tPHL | 205 | ns | VCC = 2.0 V; CL = 50 pF; Input tr = tf = 6.0 ns (Figures 3 and 6) | 4 | ||
| Maximum Propagation Delay, Input A to Output Y | tPLH, tPHL | 165 | ns | VCC = 3.0 V; CL = 50 pF; Input tr = tf = 6.0 ns (Figures 3 and 6) | 4 | ||
| Maximum Propagation Delay, Input A to Output Y | tPLH, tPHL | 41 | ns | VCC = 4.5 V; CL = 50 pF; Input tr = tf = 6.0 ns (Figures 3 and 6) | 4 | ||
| Maximum Propagation Delay, Input A to Output Y | tPLH, tPHL | 35 | ns | VCC = 6.0 V; CL = 50 pF; Input tr = tf = 6.0 ns (Figures 3 and 6) | 4 | ||
| Maximum Propagation Delay, CS1 to Output Y | tPLH, tPHL | 165 | ns | VCC = 2.0 V; CL = 50 pF; Input tr = tf = 6.0 ns (Figures 4 and 6) | 4 | ||
| Maximum Propagation Delay, CS1 to Output Y | tPLH, tPHL | 125 | ns | VCC = 3.0 V; CL = 50 pF; Input tr = tf = 6.0 ns (Figures 4 and 6) | 4 | ||
| Maximum Propagation Delay, CS1 to Output Y | tPLH, tPHL | 33 | ns | VCC = 4.5 V; CL = 50 pF; Input tr = tf = 6.0 ns (Figures 4 and 6) | 4 | ||
| Maximum Propagation Delay, CS1 to Output Y | tPLH, tPHL | 28 | ns | VCC = 6.0 V; CL = 50 pF; Input tr = tf = 6.0 ns (Figures 4 and 6) | 4 | ||
| Maximum Propagation Delay, CS2 or CS3 to Output Y | tPLH, tPHL | 180 | ns | VCC = 2.0 V; CL = 50 pF; Input tr = tf = 6.0 ns (Figures 5 and 6) | 4 | ||
| Maximum Propagation Delay, CS2 or CS3 to Output Y | tPLH, tPHL | 150 | ns | VCC = 3.0 V; CL = 50 pF; Input tr = tf = 6.0 ns (Figures 5 and 6) | 4 | ||
| Maximum Propagation Delay, CS2 or CS3 to Output Y | tPLH, tPHL | 36 | ns | VCC = 4.5 V; CL = 50 pF; Input tr = tf = 6.0 ns (Figures 5 and 6) | 4 | ||
| Maximum Propagation Delay, CS2 or CS3 to Output Y | tPLH, tPHL | 31 | ns | VCC = 6.0 V; CL = 50 pF; Input tr = tf = 6.0 ns (Figures 5 and 6) | 4 | ||
| Maximum Output Transition Time, Any Output | tTLH, tTHL | 110 | ns | VCC = 2.0 V; CL = 50 pF; Input tr = tf = 6.0 ns (Figures 4 and 6) | 4 | ||
| Maximum Output Transition Time, Any Output | tTLH, tTHL | 55 | ns | VCC = 3.0 V; CL = 50 pF; Input tr = tf = 6.0 ns (Figures 4 and 6) | 4 | ||
| Maximum Output Transition Time, Any Output | tTLH, tTHL | 22 | ns | VCC = 4.5 V; CL = 50 pF; Input tr = tf = 6.0 ns (Figures 4 and 6) | 4 | ||
| Maximum Output Transition Time, Any Output | tTLH, tTHL | 19 | ns | VCC = 6.0 V; CL = 50 pF; Input tr = tf = 6.0 ns (Figures 4 and 6) | 4 | ||
| Maximum Input Capacitance | Cin | 10 | pF | 125 °C column; all VCC | 4 |
CAD (KiCad official)
- Symbol:
MC74HC238ADTR2G - Footprint:
Package_SO:TSSOP-16_4.4x5mm_P0.65mm - 3D model: TSSOP-16 (KiCad packages3D, STEP)
- 3D model files:
mc74hc238adtr2g-etched.step/mc74hc238adtr2g-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mc74hc238adtr2g.step/mc74hc238adtr2g.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: onsemi datasheet (9 pp, sha256
eb72547dc9e9c028, retrieved 2026-10-27, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).