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MC74HC153ADR2G

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onsemi Signal Switches, Multiplexers, Decoders, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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MC74HC153ADR2G

onsemi · Signal Switches, Multiplexers, Decoders · SOIC-16

MC74HC153ADR2G from onsemi, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 STROBE a input Active-low strobe for multiplexer a; a low level applied to this pin enables its Y output.
2 A1 input Address input for multiplexer a that selects which pair of data inputs appears at the corresponding outputs.
3 D3a input Data input 3 of multiplexer a, which appears at Ya when the outputs are enabled and it is addressed.
4 D2a input Data input 2 of multiplexer a, which appears at Ya when the outputs are enabled and it is addressed.
5 D1a input Data input 1 of multiplexer a, which appears at Ya when the outputs are enabled and it is addressed.
6 D0a input Data input 0 of multiplexer a, which appears at Ya when the outputs are enabled and it is addressed.
7 Ya output Noninverting data output of multiplexer a.
8 GND power_in Ground reference; all device voltages are referenced to GND, and inputs and outputs must stay between GND and VCC.
9 Yb output Noninverting data output of multiplexer b.
10 D0b input Data input 0 of multiplexer b, which appears at Yb when the outputs are enabled and it is addressed.
11 D1b input Data input 1 of multiplexer b, which appears at Yb when the outputs are enabled and it is addressed.
12 D2b input Data input 2 of multiplexer b, which appears at Yb when the outputs are enabled and it is addressed.
13 D3b input Data input 3 of multiplexer b, which appears at Yb when the outputs are enabled and it is addressed.
14 A0 input Address input for both multiplexers that selects which pair of data inputs appears at the corresponding outputs.
15 STROBE b input Active-low strobe for multiplexer b; a low level applied to this pin enables its Yb output.
16 VCC power_in Positive supply, 2.0 V to 6.0 V referenced to GND per the recommended operating conditions.

Key specifications

Parameter Value
Manufacturer onsemi
Package SOIC-16
Category Logic
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
DC Supply Voltage (Referenced to GND) VCC 2 6 V 2
DC Input Voltage, Output Voltage (Referenced to GND) Vin, Vout 0 V Referenced to GND; max printed as VCC 2
Operating Temperature, All Package Types TA -55 125 °C All package types 2
Input Rise and Fall Time tr, tf 0 1000 ns VCC = 2.0 V (Figure 2) 2
Input Rise and Fall Time tr, tf 0 500 ns VCC = 4.5 V (Figure 2) 2
Input Rise and Fall Time tr, tf 0 400 ns VCC = 6.0 V (Figure 2) 2
DC Supply Voltage (Referenced to GND) VCC -0.5 7 V 2
DC Input Voltage (Referenced to GND) Vin -1.5 V Referenced to GND; max printed as VCC + 1.5 2
DC Output Voltage (Referenced to GND) Vout -0.5 V Referenced to GND; max printed as VCC + 0.5 2
DC Input Current, per Pin Iin -20 20 mA Per pin (printed ±20) 2
DC Output Current, per Pin Iout -25 25 mA Per pin (printed ±25) 2
DC Supply Current, VCC and GND Pins ICC -50 50 mA VCC and GND pins (printed ±50) 2
Power Dissipation in Still Air PD 500 mW SOIC package, still air (TSSOP value printed as TBD, not used) 2
Storage Temperature Tstg -65 150 °C 2
Minimum High-Level Input Voltage VIH 1.5 V VCC = 2.0 V; Vout = 0.1 V or VCC − 0.1 V; /Iout/ ≤ 20 µA; same limit at -55 to 125 °C 2
Minimum High-Level Input Voltage VIH 3.15 V VCC = 4.5 V; Vout = 0.1 V or VCC − 0.1 V; /Iout/ ≤ 20 µA; same limit at -55 to 125 °C 2
Minimum High-Level Input Voltage VIH 4.2 V VCC = 6.0 V; Vout = 0.1 V or VCC − 0.1 V; /Iout/ ≤ 20 µA; same limit at -55 to 125 °C 2
Maximum Low-Level Input Voltage VIL 0.3 V VCC = 2.0 V; Vout = 0.1 V or VCC − 0.1 V; /Iout/ ≤ 20 µA; same limit at -55 to 125 °C 2
Maximum Low-Level Input Voltage VIL 0.9 V VCC = 4.5 V; Vout = 0.1 V or VCC − 0.1 V; /Iout/ ≤ 20 µA; same limit at -55 to 125 °C 2
Maximum Low-Level Input Voltage VIL 1.2 V VCC = 6.0 V; Vout = 0.1 V or VCC − 0.1 V; /Iout/ ≤ 20 µA; same limit at -55 to 125 °C 2
Minimum High-Level Output Voltage VOH 1.9 V VCC = 2.0 V; Vin = VIH or VIL; /Iout/ ≤ 20 µA; same limit at -55 to 125 °C 2
Minimum High-Level Output Voltage VOH 4.4 V VCC = 4.5 V; Vin = VIH or VIL; /Iout/ ≤ 20 µA; same limit at -55 to 125 °C 2
Minimum High-Level Output Voltage VOH 5.9 V VCC = 6.0 V; Vin = VIH or VIL; /Iout/ ≤ 20 µA; same limit at -55 to 125 °C 2
Minimum High-Level Output Voltage VOH 3.7 V VCC = 4.5 V; Vin = VIH or VIL; /Iout/ ≤ 4.0 mA; 125 °C 2
Minimum High-Level Output Voltage VOH 5.2 V VCC = 6.0 V; Vin = VIH or VIL; /Iout/ ≤ 5.2 mA; 125 °C 2
Maximum Low-Level Output Voltage VOL 0.1 V VCC = 2.0 V; Vin = VIH or VIL; /Iout/ ≤ 20 µA; same limit at -55 to 125 °C 2
Maximum Low-Level Output Voltage VOL 0.4 V VCC = 4.5 V; Vin = VIH or VIL; /Iout/ ≤ 4.0 mA; 125 °C 2
Maximum Input Leakage Current Iin -1 1 µA VCC = 6.0 V; Vin = VCC or GND; 125 °C (printed ±1.0) 2
Maximum Quiescent Supply Current (per Package) ICC 160 µA VCC = 6.0 V; Vin = VCC or GND; Iout = 0 µA; 125 °C 2
Maximum Propagation Delay, Input D to Output Y tPLH, tPHL 210 ns VCC = 2.0 V; CL = 50 pF; 125 °C (Figures 2 and 5) 3
Maximum Propagation Delay, Input D to Output Y tPLH, tPHL 42 ns VCC = 4.5 V; CL = 50 pF; 125 °C (Figures 2 and 5) 3
Maximum Propagation Delay, Input D to Output Y tPLH, tPHL 36 ns VCC = 6.0 V; CL = 50 pF; 125 °C (Figures 2 and 5) 3
Maximum Propagation Delay, Input A to Output Y tPLH, tPHL 265 ns VCC = 2.0 V; CL = 50 pF; 125 °C (Figures 3 and 5) 3
Maximum Propagation Delay, Input A to Output Y tPLH, tPHL 53 ns VCC = 4.5 V; CL = 50 pF; 125 °C (Figures 3 and 5) 3
Maximum Propagation Delay, Input A to Output Y tPLH, tPHL 45 ns VCC = 6.0 V; CL = 50 pF; 125 °C (Figures 3 and 5) 3
Maximum Propagation Delay, Strobe to Output Y tPLH, tPHL 145 ns VCC = 2.0 V; CL = 50 pF; 125 °C (Figures 4 and 5) 3
Maximum Propagation Delay, Strobe to Output Y tPLH, tPHL 29 ns VCC = 4.5 V; CL = 50 pF; 125 °C (Figures 4 and 5) 3
Maximum Propagation Delay, Strobe to Output Y tPLH, tPHL 25 ns VCC = 6.0 V; CL = 50 pF; 125 °C (Figures 4 and 5) 3
Maximum Output Transition Time, Any Output tTLH, tTHL 110 ns VCC = 2.0 V; CL = 50 pF; 125 °C (Figures 2 and 5) 3
Maximum Output Transition Time, Any Output tTLH, tTHL 22 ns VCC = 4.5 V; CL = 50 pF; 125 °C (Figures 2 and 5) 3
Maximum Output Transition Time, Any Output tTLH, tTHL 19 ns VCC = 6.0 V; CL = 50 pF; 125 °C (Figures 2 and 5) 3
Maximum Input Capacitance Cin 10 pF 3
Power Dissipation Capacitance (Per Multiplexer) CPD 31 pF Typical @ 25°C, VCC = 5.0 V 3

CAD (KiCad official)

  • Symbol: MC74HC153ADR2G
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOIC-16 (KiCad packages3D, STEP)
  • 3D model files: mc74hc153adr2g-etched.step / mc74hc153adr2g-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mc74hc153adr2g.step / mc74hc153adr2g.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (7 pp, sha256 bf0796cf728a51a6, retrieved 2026-10-19, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF