component
MC74HC14ADTG
Public Made by Adomby adom
onsemi Inverters, TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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MC74HC14ADTG
onsemi · Inverters · TSSOP-14
MC74HC14ADTG from onsemi, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A1 | input | Schmitt-trigger inverter 1 input; unused inputs must be tied to GND or VCC. |
| 2 | Y1 | output | Inverter 1 output (Y = A inverted), drives 10 LSTTL loads; unused outputs must be left open. |
| 3 | A2 | input | Schmitt-trigger inverter 2 input; unused inputs must be tied to GND or VCC. |
| 4 | Y2 | output | Inverter 2 output (Y = A inverted), drives 10 LSTTL loads; unused outputs must be left open. |
| 5 | A3 | input | Schmitt-trigger inverter 3 input; unused inputs must be tied to GND or VCC. |
| 6 | Y3 | output | Inverter 3 output (Y = A inverted), drives 10 LSTTL loads; unused outputs must be left open. |
| 7 | GND | power_in | Ground (0 V) reference for the supply and all inputs/outputs. |
| 8 | Y4 | output | Inverter 4 output (Y = A inverted), drives 10 LSTTL loads; unused outputs must be left open. |
| 9 | A4 | input | Schmitt-trigger inverter 4 input; unused inputs must be tied to GND or VCC. |
| 10 | Y5 | output | Inverter 5 output (Y = A inverted), drives 10 LSTTL loads; unused outputs must be left open. |
| 11 | A5 | input | Schmitt-trigger inverter 5 input; unused inputs must be tied to GND or VCC. |
| 12 | Y6 | output | Inverter 6 output (Y = A inverted), drives 10 LSTTL loads; unused outputs must be left open. |
| 13 | A6 | input | Schmitt-trigger inverter 6 input; unused inputs must be tied to GND or VCC. |
| 14 | VCC | power_in | Positive supply, recommended operating range 2.0 to 6.0 V (absolute maximum 7.0 V). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | TSSOP-14 |
| Category | Logic ICs |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| DC Supply Voltage | VCC | -0.5 | 7 | V | Referenced to GND | 2 | |
| DC Input Current, per Pin | Iin | -20 | 20 | mA | 2 | ||
| DC Output Current, per Pin | Iout | -25 | 25 | mA | 2 | ||
| DC Supply Current, VCC and GND Pins | ICC | -50 | 50 | mA | 2 | ||
| Power Dissipation in Still Air, TSSOP Package | PD | 450 | mW | Derating -6.1 mW/C from 65 to 125C | 2 | ||
| Storage Temperature Range | Tstg | -65 | 150 | C | 2 | ||
| Lead Temperature | TL | 260 | C | 1 mm from case for 10 seconds, TSSOP package | 2 | ||
| DC Supply Voltage | VCC | 2 | 6 | V | Referenced to GND | 2 | |
| DC Input Voltage, Output Voltage | Vin, Vout | 0 | 6 | V | 0 to VCC, referenced to GND; max shown at VCC = 6.0 V | 2 | |
| Operating Temperature Range | TA | -55 | 125 | C | All package types | 2 | |
| Maximum Positive-Going Input Threshold Voltage | VT+ max | 3.15 | V | -55 to 25C, VCC = 4.5 V, Vout = 0.1V, /Iout/ <= 20uA | 3 | ||
| Minimum Positive-Going Input Threshold Voltage | VT+ min | 2.3 | V | -55 to 25C, VCC = 4.5 V, Vout = 0.1V, /Iout/ <= 20uA | 3 | ||
| Minimum Positive-Going Input Threshold Voltage | VT+ min | 2.25 | V | <=85C, VCC = 4.5 V, Vout = 0.1V, /Iout/ <= 20uA | 3 | ||
| Maximum Negative-Going Input Threshold Voltage | VT- max | 2 | V | -55 to 25C, VCC = 4.5 V, Vout = VCC - 0.1V, /Iout/ <= 20uA | 3 | ||
| Maximum Negative-Going Input Threshold Voltage | VT- max | 2.05 | V | <=85C, VCC = 4.5 V, Vout = VCC - 0.1V, /Iout/ <= 20uA | 3 | ||
| Minimum Negative-Going Input Threshold Voltage | VT- min | 0.9 | V | -55 to 25C, VCC = 4.5 V, Vout = VCC - 0.1V, /Iout/ <= 20uA | 3 | ||
| Maximum Hysteresis Voltage | VHmax | 2.25 | V | -55 to 25C, VCC = 4.5 V, Vout = 0.1V or VCC - 0.1V, /Iout/ <= 20uA | 3 | ||
| Minimum Hysteresis Voltage | VHmin | 0.4 | V | -55 to 25C, VCC = 4.5 V, Vout = 0.1V or VCC - 0.1V, /Iout/ <= 20uA | 3 | ||
| Minimum High-Level Output Voltage | VOH | 4.4 | V | -55 to 25C, VCC = 4.5 V, Vin <= VT- min, /Iout/ <= 20uA | 3 | ||
| Minimum High-Level Output Voltage | VOH | 3.98 | V | -55 to 25C, VCC = 4.5 V, Vin <= VT- min, /Iout/ <= 4.0mA | 3 | ||
| Minimum High-Level Output Voltage | VOH | 3.84 | V | <=85C, VCC = 4.5 V, Vin <= VT- min, /Iout/ <= 4.0mA | 3 | ||
| Minimum High-Level Output Voltage | VOH | 3.7 | V | <=125C, VCC = 4.5 V, Vin <= VT- min, /Iout/ <= 4.0mA | 3 | ||
| Maximum Low-Level Output Voltage | VOL | 0.1 | V | -55 to 25C, VCC = 4.5 V, Vin >= VT+ max, /Iout/ <= 20uA | 3 | ||
| Maximum Low-Level Output Voltage | VOL | 0.26 | V | -55 to 25C, VCC = 4.5 V, Vin >= VT+ max, /Iout/ <= 4.0mA | 3 | ||
| Maximum Low-Level Output Voltage | VOL | 0.33 | V | <=85C, VCC = 4.5 V, Vin >= VT+ max, /Iout/ <= 4.0mA | 3 | ||
| Maximum Low-Level Output Voltage | VOL | 0.4 | V | <=125C, VCC = 4.5 V, Vin >= VT+ max, /Iout/ <= 4.0mA | 3 | ||
| Maximum Input Leakage Current | Iin | -0.1 | 0.1 | µA | -55 to 25C, VCC = 6.0 V, Vin = VCC or GND | 3 | |
| Maximum Input Leakage Current | Iin | -1 | 1 | µA | <=85C, VCC = 6.0 V, Vin = VCC or GND | 3 | |
| Maximum Quiescent Supply Current (per Package) | ICC | 1 | µA | -55 to 25C, VCC = 6.0 V, Vin = VCC or GND, Iout = 0uA | 3 | ||
| Maximum Quiescent Supply Current (per Package) | ICC | 10 | µA | <=85C, VCC = 6.0 V, Vin = VCC or GND, Iout = 0uA | 3 | ||
| Maximum Quiescent Supply Current (per Package) | ICC | 40 | µA | <=125C, VCC = 6.0 V, Vin = VCC or GND, Iout = 0uA | 3 | ||
| Maximum Propagation Delay, Input A to Output Y | tPLH, tPHL | 15 | ns | -55 to 25C, VCC = 4.5 V, CL = 50pF, Input tr = tf = 6ns | 3 | ||
| Maximum Propagation Delay, Input A to Output Y | tPLH, tPHL | 19 | ns | <=85C, VCC = 4.5 V, CL = 50pF, Input tr = tf = 6ns | 3 | ||
| Maximum Propagation Delay, Input A to Output Y | tPLH, tPHL | 22 | ns | <=125C, VCC = 4.5 V, CL = 50pF, Input tr = tf = 6ns | 3 | ||
| Maximum Output Transition Time, Any Output | tTLH, tTHL | 15 | ns | -55 to 25C, VCC = 4.5 V, CL = 50pF, Input tr = tf = 6ns | 3 | ||
| Maximum Output Transition Time, Any Output | tTLH, tTHL | 19 | ns | <=85C, VCC = 4.5 V, CL = 50pF, Input tr = tf = 6ns | 3 | ||
| Maximum Output Transition Time, Any Output | tTLH, tTHL | 22 | ns | <=125C, VCC = 4.5 V, CL = 50pF, Input tr = tf = 6ns | 3 | ||
| Maximum Input Capacitance | Cin | 10 | pF | Same limit for -55 to 25C, <=85C and <=125C | 3 | ||
| Power Dissipation Capacitance (Per Inverter) | CPD | 22 | pF | Typical @ 25C, VCC = 5.0 V | 3 |
CAD (KiCad official)
- Symbol:
MC74HC14ADTG - Footprint:
Package_SO:TSSOP-14_4.4x5mm_P0.65mm - 3D model: TSSOP-14 (KiCad packages3D, STEP)
- 3D model files:
mc74hc14adtg-etched.step/mc74hc14adtg-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mc74hc14adtg.step/mc74hc14adtg.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: onsemi datasheet (9 pp, sha256
60c9099f68ca7c89, retrieved 2026-10-23, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# MC74HC14ADTG
**onsemi** · Inverters · TSSOP-14
MC74HC14ADTG from onsemi, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A1 | input | Schmitt-trigger inverter 1 input; unused inputs must be tied to GND or VCC. |
| 2 | Y1 | output | Inverter 1 output (Y = A inverted), drives 10 LSTTL loads; unused outputs must be left open. |
| 3 | A2 | input | Schmitt-trigger inverter 2 input; unused inputs must be tied to GND or VCC. |
| 4 | Y2 | output | Inverter 2 output (Y = A inverted), drives 10 LSTTL loads; unused outputs must be left open. |
| 5 | A3 | input | Schmitt-trigger inverter 3 input; unused inputs must be tied to GND or VCC. |
| 6 | Y3 | output | Inverter 3 output (Y = A inverted), drives 10 LSTTL loads; unused outputs must be left open. |
| 7 | GND | power_in | Ground (0 V) reference for the supply and all inputs/outputs. |
| 8 | Y4 | output | Inverter 4 output (Y = A inverted), drives 10 LSTTL loads; unused outputs must be left open. |
| 9 | A4 | input | Schmitt-trigger inverter 4 input; unused inputs must be tied to GND or VCC. |
| 10 | Y5 | output | Inverter 5 output (Y = A inverted), drives 10 LSTTL loads; unused outputs must be left open. |
| 11 | A5 | input | Schmitt-trigger inverter 5 input; unused inputs must be tied to GND or VCC. |
| 12 | Y6 | output | Inverter 6 output (Y = A inverted), drives 10 LSTTL loads; unused outputs must be left open. |
| 13 | A6 | input | Schmitt-trigger inverter 6 input; unused inputs must be tied to GND or VCC. |
| 14 | VCC | power_in | Positive supply, recommended operating range 2.0 to 6.0 V (absolute maximum 7.0 V). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | TSSOP-14 |
| Category | Logic ICs |
| Pins | 14 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| DC Supply Voltage | VCC | -0.5 | | 7 | V | Referenced to GND | 2 |
| DC Input Current, per Pin | Iin | -20 | | 20 | mA | | 2 |
| DC Output Current, per Pin | Iout | -25 | | 25 | mA | | 2 |
| DC Supply Current, VCC and GND Pins | ICC | -50 | | 50 | mA | | 2 |
| Power Dissipation in Still Air, TSSOP Package | PD | | | 450 | mW | Derating -6.1 mW/C from 65 to 125C | 2 |
| Storage Temperature Range | Tstg | -65 | | 150 | C | | 2 |
| Lead Temperature | TL | | | 260 | C | 1 mm from case for 10 seconds, TSSOP package | 2 |
| DC Supply Voltage | VCC | 2 | | 6 | V | Referenced to GND | 2 |
| DC Input Voltage, Output Voltage | Vin, Vout | 0 | | 6 | V | 0 to VCC, referenced to GND; max shown at VCC = 6.0 V | 2 |
| Operating Temperature Range | TA | -55 | | 125 | C | All package types | 2 |
| Maximum Positive-Going Input Threshold Voltage | VT+ max | | | 3.15 | V | -55 to 25C, VCC = 4.5 V, Vout = 0.1V, /Iout/ <= 20uA | 3 |
| Minimum Positive-Going Input Threshold Voltage | VT+ min | 2.3 | | | V | -55 to 25C, VCC = 4.5 V, Vout = 0.1V, /Iout/ <= 20uA | 3 |
| Minimum Positive-Going Input Threshold Voltage | VT+ min | 2.25 | | | V | <=85C, VCC = 4.5 V, Vout = 0.1V, /Iout/ <= 20uA | 3 |
| Maximum Negative-Going Input Threshold Voltage | VT- max | | | 2 | V | -55 to 25C, VCC = 4.5 V, Vout = VCC - 0.1V, /Iout/ <= 20uA | 3 |
| Maximum Negative-Going Input Threshold Voltage | VT- max | | | 2.05 | V | <=85C, VCC = 4.5 V, Vout = VCC - 0.1V, /Iout/ <= 20uA | 3 |
| Minimum Negative-Going Input Threshold Voltage | VT- min | 0.9 | | | V | -55 to 25C, VCC = 4.5 V, Vout = VCC - 0.1V, /Iout/ <= 20uA | 3 |
| Maximum Hysteresis Voltage | VHmax | | | 2.25 | V | -55 to 25C, VCC = 4.5 V, Vout = 0.1V or VCC - 0.1V, /Iout/ <= 20uA | 3 |
| Minimum Hysteresis Voltage | VHmin | 0.4 | | | V | -55 to 25C, VCC = 4.5 V, Vout = 0.1V or VCC - 0.1V, /Iout/ <= 20uA | 3 |
| Minimum High-Level Output Voltage | VOH | 4.4 | | | V | -55 to 25C, VCC = 4.5 V, Vin <= VT- min, /Iout/ <= 20uA | 3 |
| Minimum High-Level Output Voltage | VOH | 3.98 | | | V | -55 to 25C, VCC = 4.5 V, Vin <= VT- min, /Iout/ <= 4.0mA | 3 |
| Minimum High-Level Output Voltage | VOH | 3.84 | | | V | <=85C, VCC = 4.5 V, Vin <= VT- min, /Iout/ <= 4.0mA | 3 |
| Minimum High-Level Output Voltage | VOH | 3.7 | | | V | <=125C, VCC = 4.5 V, Vin <= VT- min, /Iout/ <= 4.0mA | 3 |
| Maximum Low-Level Output Voltage | VOL | | | 0.1 | V | -55 to 25C, VCC = 4.5 V, Vin >= VT+ max, /Iout/ <= 20uA | 3 |
| Maximum Low-Level Output Voltage | VOL | | | 0.26 | V | -55 to 25C, VCC = 4.5 V, Vin >= VT+ max, /Iout/ <= 4.0mA | 3 |
| Maximum Low-Level Output Voltage | VOL | | | 0.33 | V | <=85C, VCC = 4.5 V, Vin >= VT+ max, /Iout/ <= 4.0mA | 3 |
| Maximum Low-Level Output Voltage | VOL | | | 0.4 | V | <=125C, VCC = 4.5 V, Vin >= VT+ max, /Iout/ <= 4.0mA | 3 |
| Maximum Input Leakage Current | Iin | -0.1 | | 0.1 | µA | -55 to 25C, VCC = 6.0 V, Vin = VCC or GND | 3 |
| Maximum Input Leakage Current | Iin | -1 | | 1 | µA | <=85C, VCC = 6.0 V, Vin = VCC or GND | 3 |
| Maximum Quiescent Supply Current (per Package) | ICC | | | 1 | µA | -55 to 25C, VCC = 6.0 V, Vin = VCC or GND, Iout = 0uA | 3 |
| Maximum Quiescent Supply Current (per Package) | ICC | | | 10 | µA | <=85C, VCC = 6.0 V, Vin = VCC or GND, Iout = 0uA | 3 |
| Maximum Quiescent Supply Current (per Package) | ICC | | | 40 | µA | <=125C, VCC = 6.0 V, Vin = VCC or GND, Iout = 0uA | 3 |
| Maximum Propagation Delay, Input A to Output Y | tPLH, tPHL | | | 15 | ns | -55 to 25C, VCC = 4.5 V, CL = 50pF, Input tr = tf = 6ns | 3 |
| Maximum Propagation Delay, Input A to Output Y | tPLH, tPHL | | | 19 | ns | <=85C, VCC = 4.5 V, CL = 50pF, Input tr = tf = 6ns | 3 |
| Maximum Propagation Delay, Input A to Output Y | tPLH, tPHL | | | 22 | ns | <=125C, VCC = 4.5 V, CL = 50pF, Input tr = tf = 6ns | 3 |
| Maximum Output Transition Time, Any Output | tTLH, tTHL | | | 15 | ns | -55 to 25C, VCC = 4.5 V, CL = 50pF, Input tr = tf = 6ns | 3 |
| Maximum Output Transition Time, Any Output | tTLH, tTHL | | | 19 | ns | <=85C, VCC = 4.5 V, CL = 50pF, Input tr = tf = 6ns | 3 |
| Maximum Output Transition Time, Any Output | tTLH, tTHL | | | 22 | ns | <=125C, VCC = 4.5 V, CL = 50pF, Input tr = tf = 6ns | 3 |
| Maximum Input Capacitance | Cin | | | 10 | pF | Same limit for -55 to 25C, <=85C and <=125C | 3 |
| Power Dissipation Capacitance (Per Inverter) | CPD | | 22 | | pF | Typical @ 25C, VCC = 5.0 V | 3 |
## CAD (KiCad official)
- Symbol: `MC74HC14ADTG`
- Footprint: `Package_SO:TSSOP-14_4.4x5mm_P0.65mm`
- 3D model: TSSOP-14 (KiCad packages3D, STEP)
- 3D model files: `mc74hc14adtg-etched.step` / `mc74hc14adtg-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `mc74hc14adtg.step` / `mc74hc14adtg.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [onsemi datasheet](https://www.onsemi.com/pdf/datasheet/mc74hc14adt-d.pdf) (9 pp, sha256 `60c9099f68ca7c89`, retrieved 2026-10-23, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/mc74hc14adtg-datasheet.pdf)