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Contents

README

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MC74HC138ADTR2G

onsemi · Signal Switches / Encoders & Decoders / Multiplexers · TSSOP-16

MC74HC138ADTR2G from onsemi, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 A0 input Address input bit 0. Together with A1 and A2, selects which of the eight Y outputs is driven low when the chip is enabled.
2 A1 input Address input bit 1. Together with A0 and A2, selects which of the eight Y outputs is driven low when the chip is enabled.
3 A2 input Address input bit 2. Together with A0 and A1, selects which of the eight Y outputs is driven low when the chip is enabled.
4 CS2 input Chip-select input 2 (active-low). Must be low, along with CS3 low and CS1 high, for the chip to be selected and outputs to follow the address inputs.
5 CS3 input Chip-select input 3 (active-low). Must be low, along with CS2 low and CS1 high, for the chip to be selected and outputs to follow the address inputs.
6 CS1 input Chip-select input 1 (active-high). Must be high, along with CS2 and CS3 low, for the chip to be selected and outputs to follow the address inputs.
7 Y7 output Active-low decoded output 7. Drives low when address A2A1A0=111 and the chip is selected; otherwise remains high.
8 GND power_in Ground reference (0 V). Return for VCC supply and all logic signals.
9 Y6 output Active-low decoded output 6. Drives low when address A2A1A0=110 and the chip is selected; otherwise remains high.
10 Y5 output Active-low decoded output 5. Drives low when address A2A1A0=101 and the chip is selected; otherwise remains high.
11 Y4 output Active-low decoded output 4. Drives low when address A2A1A0=100 and the chip is selected; otherwise remains high.
12 Y3 output Active-low decoded output 3. Drives low when address A2A1A0=011 and the chip is selected; otherwise remains high.
13 Y2 output Active-low decoded output 2. Drives low when address A2A1A0=010 and the chip is selected; otherwise remains high.
14 Y1 output Active-low decoded output 1. Drives low when address A2A1A0=001 and the chip is selected; otherwise remains high.
15 Y0 output Active-low decoded output 0. Drives low when address A2A1A0=000 and the chip is selected; otherwise remains high.
16 VCC power_in Positive supply voltage, 2.0 V to 6.0 V (referenced to GND). Absolute maximum 7.0 V.

Key specifications

Parameter Value
Manufacturer onsemi
Package TSSOP-16
Category Logic
Pins 16

Ordering variants

Same part, different packaging or reel option.

  • MC74HC138ADTR2G
  • MC74HC138ADTR2GNLV74HC138ADTR2G
  • MC74HC138ADTR2GDG
  • MC74HC138ADTR2GDR2G
  • MC74HC138ADG
  • MC74HC138ADR2G
  • MC74HC138ADTR2GNLV74HC138ADR2G
  • MC74HC138ADTR2GNG
  • MC74HC138ANG

CAD (KiCad official)

  • Symbol: MC74HC138ADTR2G
  • Footprint: Package_SO:TSSOP-16_4.4x5mm_P0.65mm
  • 3D model: TSSOP-16 (KiCad packages3D, STEP)
  • 3D model files: mc74hc138adtr2g-etched.step / mc74hc138adtr2g-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mc74hc138adtr2g.step / mc74hc138adtr2g.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (10 pp, sha256 12975c730cca4e3e, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF