component
MC74HC132ADTG
Public Made by Adomby adom
onsemi Gates, TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownMC74HC132ADTG
onsemi · Gates · TSSOP-14
MC74HC132ADTG from onsemi, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A1 | input | Gate 1 Schmitt-trigger input A; unused inputs must be tied to a high or low logic level, not left open. |
| 2 | B1 | input | Gate 1 Schmitt-trigger input B; unused inputs must be tied to a high or low logic level, not left open. |
| 3 | Y1 | output | Gate 1 output, Y = NOT(A AND B), drives 10 LSTTL loads. |
| 4 | A2 | input | Gate 2 Schmitt-trigger input A; unused inputs must be tied to a high or low logic level, not left open. |
| 5 | B2 | input | Gate 2 Schmitt-trigger input B; unused inputs must be tied to a high or low logic level, not left open. |
| 6 | Y2 | output | Gate 2 output, Y = NOT(A AND B), drives 10 LSTTL loads. |
| 7 | GND | power_in | Ground pin (0 V reference for the supply and all inputs/outputs). |
| 8 | Y3 | output | Gate 3 output, Y = NOT(A AND B), drives 10 LSTTL loads. |
| 9 | A3 | input | Gate 3 Schmitt-trigger input A; unused inputs must be tied to a high or low logic level, not left open. |
| 10 | B3 | input | Gate 3 Schmitt-trigger input B; unused inputs must be tied to a high or low logic level, not left open. |
| 11 | Y4 | output | Gate 4 output, Y = NOT(A AND B), drives 10 LSTTL loads. |
| 12 | A4 | input | Gate 4 Schmitt-trigger input A; unused inputs must be tied to a high or low logic level, not left open. |
| 13 | B4 | input | Gate 4 Schmitt-trigger input B; unused inputs must be tied to a high or low logic level, not left open. |
| 14 | VCC | power_in | Positive supply voltage, recommended operating range 2.0 to 6.0 V (absolute maximum 7.0 V). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | TSSOP-14 |
| Category | Logic ICs |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| DC Supply Voltage | VCC | -0.5 | 7 | V | 3 | ||
| Digital Input Voltage | VIN | -0.5 | V | max printed as VCC+0.5 | 3 | ||
| DC Output Voltage | VOUT | -0.5 | V | max printed as VCC+0.5 | 3 | ||
| Input Diode Current | IIK | -20 | 20 | mA | 3 | ||
| Output Diode Current | IOK | -20 | 20 | mA | 3 | ||
| DC Output Current, per Pin | IOUT | -25 | 25 | mA | 3 | ||
| DC Supply Current, VCC and GND Pins | ICC | 75 | mA | 3 | |||
| DC Ground Current per Ground Pin | IGND | 75 | mA | 3 | |||
| Storage Temperature Range | TSTG | -65 | 150 | °C | 3 | ||
| Lead Temperature | TL | 260 | °C | 1 mm from case for 10 seconds | 3 | ||
| Junction Temperature Under Bias | TJ | 150 | °C | 3 | |||
| Thermal Resistance, 14-TSSOP | θJA | 170 | °C/W | 14-TSSOP | 3 | ||
| Power Dissipation in Still Air, TSSOP | PD | 450 | mW | at 85°C, TSSOP | 3 | ||
| ESD Withstand Voltage, Human Body Model | VESD | 2000 | V | Human Body Model, EIA/JESD22-A114-A | 3 | ||
| ESD Withstand Voltage, Machine Model | VESD | 100 | V | Machine Model, EIA/JESD22-A115-A | 3 | ||
| ESD Withstand Voltage, Charged Device Model | VESD | 500 | V | Charged Device Model, JESD22-C101-A | 3 | ||
| Latch-Up Performance | ILatch-Up | 300 | mA | Above VCC and below GND at 85°C | 3 | ||
| DC Supply Voltage (Referenced to GND) | VCC | 2 | 6 | V | 3 | ||
| DC Input Voltage, Output Voltage (Referenced to GND) | VIN, VOUT | 0 | V | max printed as VCC | 3 | ||
| Operating Temperature, All Package Types | TA | -55 | 125 | °C | 3 | ||
| Maximum Positive-Going Input Threshold Voltage | VT+max | 1.5 | V | VCC = 2.0 V, VOUT = 0.1 V, /IOUT/ ≤ 20 µA, -55 to 25°C | 3 | ||
| Maximum Positive-Going Input Threshold Voltage | VT+max | 3.15 | V | VCC = 4.5 V, VOUT = 0.1 V, /IOUT/ ≤ 20 µA, -55 to 25°C | 3 | ||
| Maximum Positive-Going Input Threshold Voltage | VT+max | 4.2 | V | VCC = 6.0 V, VOUT = 0.1 V, /IOUT/ ≤ 20 µA, -55 to 25°C | 3 | ||
| Minimum Positive-Going Input Threshold Voltage | VT+min | 1 | V | VCC = 2.0 V, VOUT = 0.1 V, /IOUT/ ≤ 20 µA, -55 to 25°C | 3 | ||
| Minimum Positive-Going Input Threshold Voltage | VT+min | 2.3 | V | VCC = 4.5 V, VOUT = 0.1 V, /IOUT/ ≤ 20 µA, -55 to 25°C | 3 | ||
| Minimum Positive-Going Input Threshold Voltage | VT+min | 3 | V | VCC = 6.0 V, VOUT = 0.1 V, /IOUT/ ≤ 20 µA, -55 to 25°C | 3 | ||
| Maximum Negative-Going Input Threshold Voltage | VT-max | 0.9 | V | VCC = 2.0 V, VOUT = VCC - 0.1 V, /IOUT/ ≤ 20 µA, -55 to 25°C | 3 | ||
| Maximum Negative-Going Input Threshold Voltage | VT-max | 2 | V | VCC = 4.5 V, VOUT = VCC - 0.1 V, /IOUT/ ≤ 20 µA, -55 to 25°C | 3 | ||
| Maximum Negative-Going Input Threshold Voltage | VT-max | 2.6 | V | VCC = 6.0 V, VOUT = VCC - 0.1 V, /IOUT/ ≤ 20 µA, -55 to 25°C | 3 | ||
| Minimum Negative-Going Input Threshold Voltage | VT-min | 0.3 | V | VCC = 2.0 V, VOUT = VCC - 0.1 V, /IOUT/ ≤ 20 µA, -55 to 25°C | 4 | ||
| Minimum Negative-Going Input Threshold Voltage | VT-min | 0.9 | V | VCC = 4.5 V, VOUT = VCC - 0.1 V, /IOUT/ ≤ 20 µA, -55 to 25°C | 4 | ||
| Minimum Negative-Going Input Threshold Voltage | VT-min | 1.2 | V | VCC = 6.0 V, VOUT = VCC - 0.1 V, /IOUT/ ≤ 20 µA, -55 to 25°C | 4 | ||
| Maximum Hysteresis Voltage | VHmax | 1.2 | V | VCC = 2.0 V, VOUT = 0.1 V or VCC - 0.1 V, /IOUT/ ≤ 20 µA, -55 to 25°C | 4 | ||
| Maximum Hysteresis Voltage | VHmax | 2.25 | V | VCC = 4.5 V, VOUT = 0.1 V or VCC - 0.1 V, /IOUT/ ≤ 20 µA, -55 to 25°C | 4 | ||
| Maximum Hysteresis Voltage | VHmax | 3 | V | VCC = 6.0 V, VOUT = 0.1 V or VCC - 0.1 V, /IOUT/ ≤ 20 µA, -55 to 25°C | 4 | ||
| Minimum Hysteresis Voltage | VHmin | 0.2 | V | VCC = 2.0 V, VOUT = 0.1 V or VCC - 0.1 V, /IOUT/ ≤ 20 µA, -55 to 25°C | 4 | ||
| Minimum Hysteresis Voltage | VHmin | 0.4 | V | VCC = 4.5 V, VOUT = 0.1 V or VCC - 0.1 V, /IOUT/ ≤ 20 µA, -55 to 25°C | 4 | ||
| Minimum Hysteresis Voltage | VHmin | 0.5 | V | VCC = 6.0 V, VOUT = 0.1 V or VCC - 0.1 V, /IOUT/ ≤ 20 µA, -55 to 25°C | 4 | ||
| Minimum High-Level Output Voltage | VOH | 1.9 | V | VCC = 2.0 V, /IOUT/ ≤ 20 µA, -55 to 25°C | 4 | ||
| Minimum High-Level Output Voltage | VOH | 4.4 | V | VCC = 4.5 V, /IOUT/ ≤ 20 µA, -55 to 25°C | 4 | ||
| Minimum High-Level Output Voltage | VOH | 5.9 | V | VCC = 6.0 V, /IOUT/ ≤ 20 µA, -55 to 25°C | 4 | ||
| Minimum High-Level Output Voltage | VOH | 3.98 | V | VCC = 4.5 V, /IOUT/ ≤ 4.0 mA, -55 to 25°C | 4 | ||
| Minimum High-Level Output Voltage | VOH | 5.48 | V | VCC = 6.0 V, /IOUT/ ≤ 5.2 mA, -55 to 25°C | 4 | ||
| Maximum Low-Level Output Voltage | VOL | 0.1 | V | VCC = 2.0 V, VIN ≥ VT+max, /IOUT/ ≤ 20 µA, -55 to 25°C | 4 | ||
| Maximum Low-Level Output Voltage | VOL | 0.26 | V | VCC = 4.5 V, VIN ≥ VT+max, /IOUT/ ≤ 4.0 mA, -55 to 25°C | 4 | ||
| Maximum Input Leakage Current | IIN | 0.1 | µA | VCC = 6.0 V, VIN = VCC or GND, -55 to 25°C | 4 | ||
| Maximum Input Leakage Current | IIN | 1 | µA | VCC = 6.0 V, VIN = VCC or GND, 85°C | 4 | ||
| Maximum Quiescent Supply Current (per Package) | ICC | 1 | µA | VCC = 6.0 V, VIN = VCC or GND, IOUT = 0 A, -55 to 25°C | 4 | ||
| Maximum Quiescent Supply Current (per Package) | ICC | 10 | µA | VCC = 6.0 V, VIN = VCC or GND, IOUT = 0 A, 85°C | 4 | ||
| Maximum Quiescent Supply Current (per Package) | ICC | 40 | µA | VCC = 6.0 V, VIN = VCC or GND, IOUT = 0 A, 125°C | 4 | ||
| Maximum Propagation Delay, Input A or B to Output Y | tPLH, tPHL | 25 | ns | VCC = 4.5 V, CL = 50 pF, tr = tf = 6.0 ns, -55 to 25°C | 5 | ||
| Maximum Propagation Delay, Input A or B to Output Y | tPLH, tPHL | 38 | ns | VCC = 4.5 V, CL = 50 pF, tr = tf = 6.0 ns, 125°C | 5 | ||
| Maximum Output Transition Time, Any Output | tTLH, tTHL | 15 | ns | VCC = 4.5 V, CL = 50 pF, tr = tf = 6.0 ns, -55 to 25°C | 5 | ||
| Maximum Output Transition Time, Any Output | tTLH, tTHL | 22 | ns | VCC = 4.5 V, CL = 50 pF, tr = tf = 6.0 ns, 125°C | 5 | ||
| Maximum Input Capacitance | Cin | 10 | pF | 5 | |||
| Power Dissipation Capacitance (per Gate) | CPD | 24 | pF | Typical @ 25°C, VCC = 5.0 V | 5 |
CAD (KiCad official)
- Symbol:
MC74HC132ADTG - Footprint:
Package_SO:TSSOP-14_4.4x5mm_P0.65mm - 3D model: TSSOP-14 (KiCad packages3D, STEP)
- 3D model files:
mc74hc132adtg-etched.step/mc74hc132adtg-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mc74hc132adtg.step/mc74hc132adtg.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: onsemi datasheet (10 pp, sha256
2b0099dd95732fb6, retrieved 2026-10-22, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).