MC74HC132ADR2G

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  "type": "component",
  "slug": "mc74hc132adr2g",
  "title": "MC74HC132ADR2G",
  "brief": "onsemi Gates, SOIC-14. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.1.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
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    "logic",
    "mc74hc132adr2g"
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  "component": {
    "mpn": "MC74HC132ADR2G",
    "manufacturer": "onsemi",
    "package": "SOIC-14",
    "pin_count": 14,
    "category": "Logic",
    "subcategory": "Gates",
    "datasheet": "https://www.onsemi.com/pdf/datasheet/mc74hc132a-d.pdf",
    "parts": {
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      "footprint": "mc74hc132adr2g.kicad_mod",
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      "model_3d_plain": "mc74hc132adr2g.glb",
      "model_3d_step": "mc74hc132adr2g-etched.step",
      "model_3d_step_plain": "mc74hc132adr2g.step",
      "lbr": "mc74hc132adr2g.lbr"
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    "distributor_links": {},
    "pins": [
      {
        "number": "1",
        "name": "A1",
        "type": "input",
        "description": "Gate 1 Schmitt-trigger input A. Positive-going threshold VT+ typ 2.9 V and negative-going threshold VT- typ 1.9 V at VCC=4.5 V; input leakage 1.0 uA max."
      },
      {
        "number": "2",
        "name": "B1",
        "type": "input",
        "description": "Gate 1 Schmitt-trigger input B. Schmitt-trigger CMOS input, hysteresis typ 0.9 V at VCC=4.5 V; compatible with CMOS/NMOS/LSTTL outputs (with pull-up for LSTTL)."
      },
      {
        "number": "3",
        "name": "Y1",
        "type": "output",
        "description": "Gate 1 NAND output, Y1 = NOT(A1 AND B1). Push-pull CMOS output, drives 10 LSTTL loads; IOUT up to 4.0 mA at VCC=4.5 V with VOH >= 3.98 V and VOL <= 0.26 V."
      },
      {
        "number": "4",
        "name": "A2",
        "type": "input",
        "description": "Gate 2 Schmitt-trigger input A. Same Schmitt-trigger characteristics as A1; must not be left floating (tie to VCC or GND if unused)."
      },
      {
        "number": "5",
        "name": "B2",
        "type": "input",
        "description": "Gate 2 Schmitt-trigger input B. Schmitt-trigger CMOS input, hysteresis typ 0.9 V at VCC=4.5 V."
      },
      {
        "number": "6",
        "name": "Y2",
        "type": "output",
        "description": "Gate 2 NAND output, Y2 = NOT(A2 AND B2). Propagation delay tPD typ ~25 ns at VCC=4.5 V, CL=50 pF."
      },
      {
        "number": "7",
        "name": "GND",
        "type": "power_in",
        "description": "Ground / 0 V reference for the device. Maximum DC ground current 75 mA per pin."
      },
      {
        "number": "8",
        "name": "Y3",
        "type": "output",
        "description": "Gate 3 NAND output, Y3 = NOT(A3 AND B3). CMOS push-pull output."
      },
      {
        "number": "9",
        "name": "A3",
        "type": "input",
        "description": "Gate 3 Schmitt-trigger input A. Schmitt-trigger CMOS input."
      },
      {
        "number": "10",
        "name": "B3",
        "type": "input",
        "description": "Gate 3 Schmitt-trigger input B. Schmitt-trigger CMOS input."
      },
      {
        "number": "11",
        "name": "Y4",
        "type": "output",
        "description": "Gate 4 NAND output, Y4 = NOT(A4 AND B4). CMOS push-pull output; drives 10 LSTTL loads."
      },
      {
        "number": "12",
        "name": "A4",
        "type": "input",
        "description": "Gate 4 Schmitt-trigger input A. Schmitt-trigger CMOS input."
      },
      {
        "number": "13",
        "name": "B4",
        "type": "input",
        "description": "Gate 4 Schmitt-trigger input B. Schmitt-trigger CMOS input."
      },
      {
        "number": "14",
        "name": "VCC",
        "type": "power_in",
        "description": "Positive supply, 2.0 to 6.0 V recommended (absolute max 7.0 V). Quiescent supply current ICC typ 1.0 uA at 25 degC."
      }
    ],
    "provenance": {
      "extractor": "ds2sf",
      "datasheet": {
        "url": "https://www.onsemi.com/pdf/datasheet/mc74hc132a-d.pdf",
        "pages": 9,
        "sha256": "0930a7c2aa9ab780",
        "source_tier": "mfr"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 14,
        "described": 14,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "logic": {
      "family_id": "74HC132",
      "logic_family": "74HC",
      "function_code": "132",
      "function_class": "Gate",
      "function_name": "Quad 2-Input NAND Schmitt Trigger",
      "manufacturer": "Onsemi (Motorola legacy)",
      "is_specialty": false
    },
    "models_3d": [
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        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
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          1.75
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        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "3b9a775da256c8afcc28dcddfbc2eb3f266107fe61ce8446d96f2c52b6f44a70",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
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      {
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        "units": "mm",
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        "seat": "z = 0",
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        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
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  },
  "metadata": {
    "specs": {
      "Manufacturer": "onsemi",
      "Package": "SOIC-14",
      "Category": "Logic",
      "Pins": "14"
    }
  },
  "variants": [
    {
      "mpn": "MC74HC132ADR2GDG",
      "kind": "packaging"
    },
    {
      "mpn": "MC74HC132ADR2G",
      "kind": "packaging"
    },
    {
      "mpn": "MC74HC132ADR2GDTG",
      "kind": "packaging"
    },
    {
      "mpn": "MC74HC132ADR2GDTR2G",
      "kind": "packaging"
    },
    {
      "mpn": "MC74HC132ADR2GNG",
      "kind": "packaging"
    }
  ],
  "sections": [
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    "info"
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  "discovery_triggers": [
    "mc74hc132adr2g"
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  "discovery_pitch": "MC74HC132ADR2G (onsemi) component page with datasheet-verified CAD.",
  "author": {
    "name": "Ray",
    "email": "[email protected]"
  },
  "dependencies": {},
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    "mc74hc132adr2g.lbr",
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    "docs/mc74hc132adr2g-datasheet.pdf",
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  "visibility": {
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  "updated_at": "2026-09-28T18:51:38.347Z"
}